Alternatives and similar repositories for diplomacy:

Users that are interested in diplomacy are comparing it to the libraries listed below

• sequencer / arithmetic
  ☆32Updated this week
• ics-jku / riscv-vp-plusplus
  RISCV-VP++ is a extended and improved successor of the RISC-V based Virtual Prototype (VP) RISC-V VP. It is maintained at the Institute f…
  ☆28Updated this week
• ucb-bar / shuttle
  A Rocket-based RISC-V superscalar in-order core
  ☆29Updated 2 weeks ago
• msyksphinz-self / minimal-diplomacy
  Example of Chisel3 Diplomacy
  ☆11Updated 2 years ago
• riscv-verification / riscvISACOV
  SystemVerilog Functional Coverage for RISC-V ISA
  ☆25Updated 4 months ago
• rameloni / tywaves-chisel
  A repository that implements Tywaves: enabling a type-based waveform debugging for Chisel and Tydi-Chisel. Mapping from Chisel level code…
  ☆36Updated 3 months ago
• freechipsproject / ip-contributions
  For contributions of Chisel IP to the chisel community.
  ☆59Updated 3 months ago
• ic-lab-duth / DRIM-S
  DUTH RISC-V Superscalar Microprocessor
  ☆30Updated 3 months ago
• YosysHQ-GmbH / SVA-AXI4-FVIP
  YosysHQ SVA AXI Properties
  ☆37Updated 2 years ago
• esl-epfl / OpenEdgeCGRA
  An Open-Hardware CGRA for accelerated computation on the edge.
  ☆16Updated 5 months ago
• chipsalliance / espresso
  ☆37Updated last year
• chipsalliance / systemc-compiler
  Intel Compiler for SystemC
  ☆24Updated last year
• freechipsproject / chisel-cheatsheet
  Chisel Cheatsheet
  ☆32Updated last year
• chipsalliance / tilelink
  ☆27Updated 2 months ago
• merledu / TileLink
  TileLink Uncached Lightweight (TL-UL) implementation on Chisel.
  ☆20Updated 4 years ago
• adki / cosim_bfm_library
  HW-SW Co-Simulation Library for AMBA AXI BFM using DPI/VPI
  ☆30Updated last month
• TsaiAnson / verif
  ☆11Updated 3 years ago
• whatmough / CHIPKIT
  CHIPKIT: An agile, reusable open-source framework for rapid test chip development
  ☆40Updated 4 years ago
• pulp-platform / fpu
  ☆41Updated 6 years ago
• j-marjanovic / chisel-bfm-tester
  BFM Tester for Chisel HDL
  ☆14Updated 3 years ago
• sifferman / labs-with-cva6
  Advanced Architecture Labs with CVA6
  ☆54Updated last year
• sld-columbia / hl5
  A 32-bit RISC-V Processor Designed with High-Level Synthesis
  ☆52Updated 5 years ago
• sifive / chisel-circt
  Library to compile Chisel circuits using LLVM/MLIR (CIRCT)
  ☆71Updated last year
• RISMicroDevices / CHIron
  Open-source AMBA CHI infrastructures (supporting Issue B, E.b)
  ☆16Updated this week
• maltanar / systemc-chisel-tools
  A collection of tools for working with Chisel-generated hardware in SystemC
  ☆16Updated 5 years ago
• MikeCovrado / GettingVerilatorStartedWithUVM
  Simple UVM environment for experimenting with Verilator.
  ☆17Updated last month
• ljwljwljwljw / DiplomaticBackend
  ☆17Updated 2 years ago
• RoaLogic / plic
  Platform Level Interrupt Controller
  ☆36Updated 9 months ago
• samehattia / StateMover
  StateMover is a checkpoint-based debugging framework for FPGAs.
  ☆18Updated 2 years ago
• chick / visualizer
  Provides dot visualizations of chisel/firrtl circuites
  ☆12Updated 5 years ago