Alternatives and similar repositories for nvboard

Users that are interested in nvboard are comparing it to the libraries listed below

• OSCPU / ysyx-workbench
  ☆156Updated this week
• shinezyy / micro-arch-training
  How to make undergraduates or new graduates ready for advanced computer architecture research or modern CPU design
  ☆595Updated last year
• ISRC-CAS / riscv-isa-manual-cn
  ☆190Updated 3 weeks ago
• OSCPU / ysyx
  一生一芯的信息发布和内容网站
  ☆135Updated last year
• loongson-education / nscscc-wiki
  NSCSCC 信息整合
  ☆251Updated 4 years ago
• arch-simulator-sig / advanced-computer-architecture
  体系结构研讨 + ysyx高阶大纲 (WIP
  ☆181Updated last year
• LoveLonelyTime / Bergamot
  An exquisite superscalar RV32GC processor.
  ☆161Updated 9 months ago
• SocialistDalao / UltraMIPS_NSCSCC
  UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.
  ☆143Updated last year
• fluctlight001 / nscscc2022_single_tools
  龙芯杯个人赛工具包（适用于个人赛的golden_trace工具）
  ☆61Updated last year
• Silverster98 / bit_nscscc_suggestion
  为了更好地帮助后来的同学参加龙芯杯，草拟了这份建议，望对后来人有所帮助
  ☆130Updated 5 years ago
• ysyx-ta / ysyx-summer-readings
  ☆67Updated last year
• NJU-ProjectN / fceux-am
  ☆101Updated 11 months ago
• USTC-System-Courses / CECS-Lab
  ☆40Updated 2 years ago
• MaxXSoft / Fuxi
  Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.
  ☆175Updated 4 years ago
• fluctlight001 / cpu_for_nscscc2022_single
  2022年龙芯杯个人赛 单发射110M（含icache）
  ☆48Updated 3 years ago
• fluctlight001 / cpu_for_nscscc2020
  2020龙芯杯个人赛 简易双发射60M（含ibuffer）
  ☆40Updated 5 years ago
• renyangang / riscv-mcu
  This project utilizes the Digital circuit simulation software,to build a CPU that supports a simple instruction set and simple peripheral…
  ☆71Updated 6 months ago
• OpenXiangShan / NEMU
  Super fast RISC-V ISA emulator for XiangShan processor
  ☆295Updated last week
• fluctlight001 / Generic-Cache-Module
  适用于龙芯杯团队赛入门选手的应急cache模块
  ☆30Updated last year
• DawnCarol / DawnCarol
  ☆209Updated 6 months ago
• NSCSCC-2020-Fudan / FDU1.1-NSCSCC
  复旦大学FDU1.1队在第四届“龙芯杯”的参赛作品
  ☆44Updated 5 years ago
• Yawei-Ding / ysyx_riscv64_cpu
  ☆70Updated 2 years ago
• OSCPU / ysyxSoC
  ☆87Updated 3 weeks ago
• redlightASl / Notes
  ☆84Updated 3 months ago
• ysyx-ta / ysyx-slides
  ☆30Updated 4 months ago
• hehao98 / RISCV-Simulator
  A Simple RISC-V CPU Simulator with 5 Stage Pipeline, Branch Prediction and Cache Simulation
  ☆195Updated last year
• luzhixing12345 / archlab
  NUDT 高级体系结构实验
  ☆35Updated last year
• OSCPU / yosys-sta
  ☆83Updated 6 months ago
• Groupsun / riscv-mini-five-stage
  This is my graduation project, a simple processor soft core, which implements RV32I ISA.
  ☆16Updated 6 years ago
• riscv-non-isa / riscv-elf-psabi-doc
  A RISC-V ELF psABI Document
  ☆807Updated last week