HWAC-DL / hwac_object_trackerLinks
FPGA accelerated TinyYOLO v2 object detection neural network
☆76Updated 7 years ago
Alternatives and similar repositories for hwac_object_tracker
Users that are interested in hwac_object_tracker are comparing it to the libraries listed below
Sorting:
- hls code zynq 7020 pynq z2 CNN☆89Updated 6 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆105Updated 2 years ago
- FPGA/AES/LeNet/VGG16☆108Updated 7 years ago
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆194Updated last year
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆116Updated 8 years ago
- A hardware implementation of CNN, written by Verilog and synthesized on FPGA☆249Updated 7 years ago
- ☆250Updated 5 years ago
- A convolutional neural network implemented in hardware (verilog)☆166Updated 8 years ago
- 中文:☆108Updated 6 years ago
- FPGA Accelerator for CNN using Vivado HLS☆331Updated 4 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆51Updated 5 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆187Updated 9 years ago
- Convolutional Neural Network Using High Level Synthesis☆90Updated 5 years ago
- Implementation of CNN using Verilog☆241Updated 8 years ago
- First lesson for you to use DNNDK, also it can be helpful for your AI learning☆77Updated 2 years ago
- DPU on PYNQ☆242Updated 6 months ago
- Implement Tiny YOLO v3 on ZYNQ☆306Updated 9 months ago
- An LeNet RTL implement onto FPGA☆50Updated 7 years ago
- FPGA implementation of Cellular Neural Network (CNN)☆142Updated 7 years ago
- ☆48Updated 7 years ago
- SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…☆112Updated 5 years ago
- Squeezenet V1.1 on Cyclone V SoC-FPGA at 450ms/image, 20x faster than ARM A9 processor alone. A project for 2017 Innovate FPGA design con…☆114Updated 7 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆48Updated 5 years ago
- Convolution Neural Network of vgg19 model in verilog☆49Updated 8 years ago
- This repository hosts the code for an FPGA based accelerator for convolutional neural networks☆181Updated last year
- PYNQ学习资料☆174Updated 6 years ago
- A VGG accelerator by System Verilog on DE1-SoC FPGA. Row Stationary (RS) dataflow is adopted, and computations are based on fixed point 1…☆34Updated 6 years ago
- FPGA☆159Updated last year
- Example of Tiny YOLO deployed using Xilinx BNN-PYNQ.☆31Updated 6 years ago
- A FPGA Based CNN accelerator, following Google's TPU V1.☆172Updated 6 years ago