☆11Mar 4, 2025Updated last year
Alternatives and similar repositories for IC-Contest-Cell-Based
Users that are interested in IC-Contest-Cell-Based are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- IC-contest 2012~2024☆26Apr 30, 2024Updated 2 years ago
- ☆10Aug 30, 2024Updated 2 years ago
- ☆16May 30, 2021Updated 5 years ago
- IC Contest☆47Mar 28, 2023Updated 3 years ago
- Website for the OpenROAD tutorial held at the MICRO 2022 conference☆36Oct 6, 2022Updated 3 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- ☆39Jun 13, 2026Updated 2 months ago
- 題目練習☆13Sep 29, 2022Updated 3 years ago
- A Verilog design of LeNet-5, a Convolutional Neural Network architecture☆36Jun 30, 2020Updated 6 years ago
- ☆75Jul 7, 2026Updated last month
- A Flexible and Energy Efficient Accelerator For Sparse Convolution Neural Network☆154Jul 22, 2025Updated last year
- Integrated Circuit Design Contest (ICDC) - 大學院校積體電路設計競賽☆25Apr 20, 2022Updated 4 years ago
- ☆21Jan 21, 2025Updated last year
- ☆18May 27, 2024Updated 2 years ago
- FPGA accelerated TinyYOLO v2 object detection neural network☆79Jul 31, 2018Updated 8 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- SynthPilot官方教程文档☆32Apr 8, 2026Updated 4 months ago
- Student project for using audio on the DE2-115 FPGA development board.☆28Apr 28, 2018Updated 8 years ago
- some interesting demos for starters☆102Jul 25, 2026Updated last month
- ☆26Sep 30, 2025Updated 11 months ago
- ☆128Jul 22, 2020Updated 6 years ago
- RTL Network-on-Chip Router Design in SystemVerilog by Andrea Galimberti, Filippo Testa and Alberto Zeni☆156Mar 19, 2018Updated 8 years ago
- 楊家驤老師的"電腦輔助積體電路系統設計"作業(CVSD)☆50Oct 6, 2024Updated last year
- 💻 A 5-stage pipeline MIPS CPU implementation in Verilog.☆33Jul 5, 2020Updated 6 years ago
- Generator of verilog description for FPGA MobileNet implementation☆188Jun 23, 2022Updated 4 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Discussion Forum for High-Level Synthesis (HLS) Courses in Taiwan.☆58Sep 5, 2023Updated 2 years ago
- ☆44Apr 6, 2023Updated 3 years ago
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器☆198Apr 10, 2023Updated 3 years ago
- NCTU 2021 Spring Integrated Circuit Design Laboratory☆210Apr 2, 2023Updated 3 years ago
- Real time face detection based on Arm Cortex-M3 DesignStart and FPGA☆215Aug 23, 2023Updated 3 years ago
- ☆66Dec 3, 2021Updated 4 years ago
- 交通大學iclab 2023 fall☆53Oct 18, 2024Updated last year
- ☆109Nov 30, 2023Updated 2 years ago
- 超詳細 ICLAB 2024 Spring 修課心得 & 修課指南,含資源整理☆152Apr 30, 2026Updated 4 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- A Pytorch implementation of MoveNet from Google. Include training code and pre-trained model.☆420Jan 21, 2025Updated last year
- Spring 2023 NYCU (prev. NCTU) Integrated Circuit Design Laboratory (ICLab)☆177Sep 9, 2024Updated last year
- 使用Verilog实现的CNN模块,可以方便的在FPGA项目中使用☆591Jun 18, 2018Updated 8 years ago
- Deep Learning Accelerator Based on Eyeriss V2 Architecture with custom RISC-V extended instructions☆211Jun 25, 2020Updated 6 years ago
- OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/☆722Updated this week
- [DATE'25, ICCAD'25] An embedded FPGA-based LLM accelerator capable of supporting Llama2-7B☆190Jul 30, 2026Updated last month
- Research and Materials on Hardware implementation of Transformer Model☆311Feb 28, 2025Updated last year