XAli-SHX / FPGA-Implementation-of-Image-Processing-for-MNIST-Dataset-Based-on-CNN-AlgorithmLinks
FPGA Implementation of Image Processing for MNIST Dataset Based on Convolutional Neural Network Algorithm (CNN)
☆11Updated last year
Alternatives and similar repositories for FPGA-Implementation-of-Image-Processing-for-MNIST-Dataset-Based-on-CNN-Algorithm
Users that are interested in FPGA-Implementation-of-Image-Processing-for-MNIST-Dataset-Based-on-CNN-Algorithm are comparing it to the libraries listed below
Sorting:
- ☆19Updated 4 years ago
- FPGA implement of 8x8 weight stationary systolic array DNN accelerator☆13Updated 4 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆38Updated 6 years ago
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆14Updated 2 years ago
- Framework for radix encoded SNN on FPGA☆15Updated 3 years ago
- Efficient FPGA-Based Accelerator for Convolutional Neural Networks☆28Updated last year
- SNN on FPGA☆11Updated 3 years ago
- A neural network built in Verilog for the DE1-SoC FPGA board for handwritten digit recognition.☆18Updated 5 years ago
- EE 272B - VLSI Design Project☆13Updated 4 years ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆35Updated 6 years ago
- CNN hardware accelerator to accelerate quantized LeNet-5 model☆41Updated 2 years ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆61Updated 4 years ago
- A final semester based group project for EE4218: Embedded Hardware System Design module in NUS where I worked with my teammate to perform…☆16Updated 2 years ago
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆60Updated 7 months ago
- A Spiking Neuron Network Project in Verilog Implementation☆25Updated 7 years ago
- This project is to design yolo AI accelerator in verilog HDL.☆28Updated last year
- Arrhythmia Detection Using Algorithm and Hardware Co-design for Neural Network Inference Accelerators☆16Updated 2 years ago
- A CNN-based hardware digit/image recognition module designed on PyTorch and then implemented with Verilog on FPGA☆20Updated 2 years ago
- Convolutional Neural Network Implemented in Verilog for System on Chip☆27Updated 6 years ago
- ☆15Updated 3 years ago
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆66Updated 2 years ago
- A repository FPGA-friendly SNN models☆33Updated 4 years ago
- Spiking neural network implementation using Verilog with LIF (Leaky Integrate-and-Fire) neurons☆19Updated 5 years ago
- ☆17Updated 4 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆10Updated 3 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆48Updated 5 years ago
- Spiking Neural Network RTL Implementation☆60Updated 4 years ago
- MIPS Processor, BNN Accelerator, AXI4 interface, Cache Controller and LRU replacement☆12Updated 2 years ago
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆25Updated 5 years ago
- SystemVerilog files for lab project on a DNN hardware accelerator☆17Updated 4 years ago