Xingxiangrui / MTCNN_with_HLS_On_FPGA
MTCNN with convolution reprogramed in c
☆14Updated 5 years ago
Related projects ⓘ
Alternatives and complementary repositories for MTCNN_with_HLS_On_FPGA
- This is an open CNN accelerator for everyone to use☆14Updated 5 years ago
- ☆53Updated 5 years ago
- Light-weighted neural network inference for object detection on small-scale FPGA board☆91Updated 5 years ago
- ☆35Updated 5 years ago
- ☆19Updated 7 years ago
- At present, just an example to show how to map the detection algorithm YOLOv2 from model to FPGA☆31Updated 5 years ago
- This project implemented an unoptimized simple convolutional neural network in ZYNQ's PL and realized data transmission through axidma dr…☆12Updated 6 years ago
- OpenCL Labs for PAPAA Summer School 2016 Edition☆46Updated 7 years ago
- The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track☆88Updated 6 years ago
- FPGA accelerator and port of the emotion recognition CNN running in C on Xilinx ZYNQ☆19Updated 5 years ago
- Design contest for DAC 2018☆17Updated 6 years ago
- ☆43Updated 6 years ago
- Verilog Convolutional Neural Network on PYNQ☆27Updated 6 years ago
- A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA☆21Updated 3 years ago
- A demo for accelerating sobel in xilinx's fpga pynq☆17Updated last year
- verilog CNN generator for FPGA☆32Updated 3 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆106Updated 7 years ago
- Aiming at an AI Chip based on RISC-V and NVDLA.☆21Updated 6 years ago
- This repository contains a SDSoC Project which includes an implementation of a 3-layered artificial neural network (testphase only). It c…☆12Updated 8 years ago
- Convolution Neural Network of vgg19 model in verilog☆44Updated 6 years ago
- Face recognition, computer vision, deep learning, PYNQ, Movidius NCS☆58Updated 5 years ago
- DAC System Design Contest 2020☆29Updated 4 years ago
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆36Updated 5 years ago
- ☆31Updated 5 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆90Updated 11 months ago
- This repo has codes for hardware accelerator design for CNNs using high level synthesis from Altera.☆13Updated 6 years ago