KULeuven-MICAS / streamLinks
Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
☆54Updated last week
Alternatives and similar repositories for stream
Users that are interested in stream are comparing it to the libraries listed below
Sorting:
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆79Updated 3 years ago
- An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.☆60Updated 4 months ago
- A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching☆54Updated 3 months ago
- A framework for fast exploration of the depth-first scheduling space for DNN accelerators☆39Updated 2 years ago
- RTL implementation of Flex-DPE.☆106Updated 5 years ago
- MICRO22 artifact evaluation for Sparseloop☆45Updated 2 years ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆80Updated 11 months ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆93Updated 9 months ago
- HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators☆151Updated last week
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆54Updated 2 months ago
- Implementation of Microscaling data formats in SystemVerilog.☆21Updated last week
- CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture☆147Updated this week
- ☆56Updated 3 months ago
- ☆35Updated 3 months ago
- ☆71Updated 2 years ago
- A Spatial Accelerator Generation Framework for Tensor Algebra.☆58Updated 3 years ago
- An Open-Source Tool for CGRA Accelerators☆67Updated 2 months ago
- ☆17Updated 2 months ago
- ☆41Updated last year
- ☆35Updated 5 years ago
- Exercises for exploring the Fibertree, Timeloop and Accelergy tools☆98Updated 3 months ago
- ☆30Updated 8 months ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆82Updated last year
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆58Updated 7 months ago
- STONNE: A Simulation Tool for Neural Networks Engines☆133Updated 3 weeks ago
- ☆27Updated 3 months ago
- [TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers☆49Updated last year
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆75Updated 6 years ago
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆84Updated 2 months ago
- ☆49Updated 3 years ago