papcjy / mnist_fpga
using xilinx xc6slx45 to implement mnist net
☆83Updated 6 years ago
Alternatives and similar repositories for mnist_fpga:
Users that are interested in mnist_fpga are comparing it to the libraries listed below
- 中文:☆97Updated 5 years ago
- it is a set for all the respository of the project.☆96Updated 5 years ago
- hls code zynq 7020 pynq z2 CNN☆81Updated 6 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆92Updated last year
- PYNQ学习资料☆163Updated 5 years ago
- FPGA☆151Updated 8 months ago
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆172Updated last year
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆109Updated 7 years ago
- An LeNet RTL implement onto FPGA☆44Updated 6 years ago
- ☆52Updated last year
- FPGA/AES/LeNet/VGG16☆99Updated 6 years ago
- HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn☆236Updated 3 years ago
- FPGA Accelerator for CNN using Vivado HLS☆313Updated 3 years ago
- Lenet for MNIST handwritten digit recognition using Vivado hls tool☆36Updated 4 years ago
- A hardware implementation of CNN, written by Verilog and synthesized on FPGA☆226Updated 6 years ago
- 基于HLS的高效深度卷积神经网络FPGA实现方法☆69Updated 5 years ago
- FPGA accelerated TinyYOLO v2 object detection neural network☆71Updated 6 years ago
- The second place winner for DAC-SDC 2020☆97Updated 2 years ago
- Real time face detection based on Arm Cortex-M3 DesignStart and FPGA☆197Updated last year
- 【入门项目】基于PYNQ-Z2实现手写数字识别卷积神经网络硬件加速器☆138Updated last year
- The CNN based on the Xilinx Vivado HLS☆37Updated 3 years ago
- FPGA实现动态图像识别☆17Updated 4 years ago
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆37Updated 5 years ago
- ☆45Updated 6 years ago
- A simple demo to implement the Handwritten Mathematical Calculator on PYNQ-Z2 FPGA platform by using HLS.☆38Updated 4 years ago
- achieve softmax in PYNQ with heterogeneous computing.☆63Updated 6 years ago
- A DNN Accelerator implemented with RTL.☆63Updated 2 months ago
- Face recognition, computer vision, deep learning, PYNQ, Movidius NCS☆59Updated 6 years ago
- At present, just an example to show how to map the detection algorithm YOLOv2 from model to FPGA☆31Updated 6 years ago
- Implementation of YOLOv3-tiny + Depthwise Separable Convolution on FPGA☆29Updated 3 years ago