mfarhadi / CNNIOTLinks
☆48Updated 7 years ago
Alternatives and similar repositories for CNNIOT
Users that are interested in CNNIOT are comparing it to the libraries listed below
Sorting:
- hls code zynq 7020 pynq z2 CNN☆89Updated 6 years ago
- 中文:☆108Updated 6 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆116Updated 8 years ago
- Convolution Neural Network of vgg19 model in verilog☆49Updated 8 years ago
- Light-weighted neural network inference for object detection on small-scale FPGA board☆92Updated 6 years ago
- This TRD is implement DPU v1.4.0 on PYNQ-Z2 board☆51Updated 5 years ago
- FPGA accelerator and port of the emotion recognition CNN running in C on Xilinx ZYNQ☆21Updated 6 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆105Updated 2 years ago
- FPGA/AES/LeNet/VGG16☆108Updated 7 years ago
- The second place winner for DAC-SDC 2020☆99Updated 3 years ago
- FPGA-based neural network inference project for 2020 DAC System Design Contest☆114Updated 4 years ago
- A VGG accelerator by System Verilog on DE1-SoC FPGA. Row Stationary (RS) dataflow is adopted, and computations are based on fixed point 1…☆34Updated 6 years ago
- Convolutional Neural Network Using High Level Synthesis☆90Updated 5 years ago
- A DNN Accelerator implemented with RTL.☆69Updated last year
- 基于HLS的高效深度卷积神经网络FPGA实现方法☆71Updated 6 years ago
- ☆73Updated 7 years ago
- FPGA and GPU acceleration of LeNet5☆35Updated 6 years ago
- CNN accelerator implemented with Spinal HDL☆157Updated 2 years ago
- CNN-Accelerator based on FPGA developed by verilog HDL.☆48Updated 5 years ago
- Example of Tiny YOLO deployed using Xilinx BNN-PYNQ.☆31Updated 6 years ago
- Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools☆53Updated 7 years ago
- A FPGA Based CNN accelerator, following Google's TPU V1.☆172Updated 6 years ago
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆194Updated last year
- An LeNet RTL implement onto FPGA☆50Updated 7 years ago
- The CNN based on the Xilinx Vivado HLS☆37Updated 4 years ago
- This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems u…☆37Updated 6 years ago
- Deploy CNN accelerator in embedded OS using SDSOC and Xilinx Ultrascale+ ZCU102 platform.☆25Updated 7 years ago
- PYNQ-Torch: a framework to develop PyTorch accelerators on the PYNQ platform☆76Updated 5 years ago
- An OpenCL-Based FPGA Accelerator for Compressed YOLOv2☆39Updated 4 years ago
- Deep Learning Accelerator (Convolution Neural Networks)☆197Updated 8 years ago