jgoeders / dac_sdc_2020
DAC System Design Contest 2020
☆29Updated 4 years ago
Alternatives and similar repositories for dac_sdc_2020:
Users that are interested in dac_sdc_2020 are comparing it to the libraries listed below
- Designs for finalist teams of the DAC System Design Contest☆36Updated 4 years ago
- ☆35Updated 5 years ago
- ☆23Updated 3 years ago
- ☆69Updated 4 years ago
- Light-weighted neural network inference for object detection on small-scale FPGA board☆91Updated 5 years ago
- A FPGA-based neural network inference accelerator, which won the third place in DAC-SDC☆28Updated 2 years ago
- ☆19Updated 2 years ago
- ☆19Updated 3 years ago
- The second place winner for DAC-SDC 2020☆96Updated 2 years ago
- ☆21Updated 2 years ago
- ☆33Updated 5 years ago
- ☆53Updated 5 years ago
- ☆71Updated last year
- ☆25Updated last month
- HLS implemented systolic array structure☆41Updated 7 years ago
- My name is Fang Biao. I'm currently pursuing my Master degree with the college of Computer Science and Engineering, Si Chuan University, …☆41Updated last year
- Simulator for BitFusion☆94Updated 4 years ago
- FPGA-based neural network inference project for 2020 DAC System Design Contest☆111Updated 3 years ago
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆89Updated 3 years ago
- ☆17Updated 2 years ago
- ☆11Updated 9 months ago
- pytorch fixed point training tool/framework☆34Updated 4 years ago
- Residual Binarized Neural Network☆44Updated 6 years ago
- Example of Tiny YOLO deployed using Xilinx BNN-PYNQ.☆31Updated 5 years ago
- 2020 xilinx summer school☆17Updated 4 years ago
- ☆15Updated 3 years ago
- Static Block Floating Point Quantization for CNN☆32Updated 3 years ago
- Eyeriss chip simulator☆35Updated 4 years ago
- An HLS based winograd systolic CNN accelerator☆49Updated 3 years ago
- ☆18Updated last year