max2ma / shiftNet
☆13Updated 4 years ago
Related projects ⓘ
Alternatives and complementary repositories for shiftNet
- PyTorch implementation of DiracDeltaNet from paper Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs☆31Updated 5 years ago
- Provides the code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerators" by Luk…☆17Updated 5 years ago
- This is a collection of works on neural networks and neural accelerators.☆40Updated 5 years ago
- Official implementation of "Searching for Winograd-aware Quantized Networks" (MLSys'20)☆27Updated last year
- Approximate layers - TensorFlow extension☆26Updated 6 months ago
- Designs for finalist teams of the DAC System Design Contest☆35Updated 4 years ago
- ☆35Updated 5 years ago
- Codes for Binary Ensemble Neural Network: More Bits per Network or More Networks per Bit?☆31Updated 5 years ago
- An implementation of a BinaryConnect network for cifar10☆11Updated 5 years ago
- ☆69Updated 4 years ago
- SAMO: Streaming Architecture Mapping Optimisation☆32Updated last year
- Static Block Floating Point Quantization for CNN☆32Updated 3 years ago
- ☆31Updated 5 years ago
- ☆19Updated 3 years ago
- Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…☆24Updated 4 years ago
- ☆23Updated 3 years ago
- DAC System Design Contest 2020☆29Updated 4 years ago
- This repo is for ECE44x (Fall2015-Spring2016)☆19Updated 6 years ago
- Simulator for BitFusion☆90Updated 4 years ago
- Systolic-array based Deep Learning Accelerator generator☆24Updated 3 years ago
- Residual Binarized Neural Network☆44Updated 6 years ago
- BlockCIrculantRNN (LSTM and GRU) using TensorFlow☆14Updated 6 years ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆59Updated 3 years ago
- BISMO: A Scalable Bit-Serial Matrix Multiplication Overlay for Reconfigurable Computing☆131Updated 4 years ago
- HLS implemented systolic array structure☆40Updated 6 years ago
- ☆19Updated 7 years ago
- ☆55Updated 4 years ago
- Open Source Compiler Framework using ONNX as Frontend and IR☆29Updated 2 years ago