A RISC-V Symmetric Multiprocessor(SMP) based on TileLink and can run Linux OS
☆39Oct 23, 2025Updated 11 months ago
Alternatives and similar repositories for SiYuan
Users that are interested in SiYuan are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Linux on RISC-V on FPGA (LOROF): RV64GC Sv39 Quad-Core Superscalar Out-of-Order Virtual Memory CPU☆19Oct 2, 2026Updated 2 weeks ago
- ☆18Aug 17, 2026Updated 2 months ago
- A cycle-accurate RISC-V CPU simulator + RTL modeling library in pure Python.☆20Aug 14, 2026Updated 2 months ago
- ☆38Updated this week
- Andes Vector Extension support added to riscv-dv☆19May 29, 2020Updated 6 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- ☆16Apr 21, 2019Updated 7 years ago
- ☆21Jan 13, 2026Updated 9 months ago
- A superscalar RISC-V CPU with out-of-order execution and multi-core support☆62Feb 17, 2022Updated 4 years ago
- Linux-capable superscalar out-of-order RISC core (with Cache& MMU) and SoC, having been verified on Xilinx Kintex-7 FPGA.☆56Aug 14, 2024Updated 2 years ago
- Quasar 2.0: Chisel equivalent of SweRV-EL2☆35Apr 13, 2021Updated 5 years ago
- This is the open-source version of TinyTS. The code is dirty so far. We may clean the code in the future.☆22Aug 11, 2025Updated last year
- Anatomy of a powerhouse: SystemVerilog TPU based on Google TPU v1☆26Nov 9, 2025Updated 11 months ago
- ☆103Updated this week
- 给NEMU移植Linux Kernel!☆23Jun 1, 2025Updated last year
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- DUTH RISC-V Superscalar Microprocessor☆35Oct 23, 2024Updated last year
- Open-source non-blocking L2 cache☆65Updated this week
- AXI DMA Check: A utility to measure DMA speeds in simulation☆16Jan 22, 2025Updated last year
- This is a project created and completed by team BOOM(Beihang OO masters).This is a superscalar processor with a 13-stage out-of-order dua…☆18Sep 29, 2024Updated 2 years ago
- 《关于浮点运算:作为程序员都应该了解什么?》☆28Apr 17, 2018Updated 8 years ago
- ☆93Apr 22, 2025Updated last year
- A docker image for One Student One Chip's debug exam☆10Sep 22, 2023Updated 3 years ago
- High performance LA32R out-of-order processor core. (NSCSCC 2023 Special Prize)☆100Aug 29, 2023Updated 3 years ago
- Open Source Chip Project by University (OSCPU) - Zhoushan Core☆54Jul 23, 2022Updated 4 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Chisel RISC-V Vector 1.0 Implementation☆158Updated this week
- ☆27Oct 1, 2026Updated 2 weeks ago
- Designed a pipelined calculation engine to read input/weights of neuron and compute/store results in SystemVerilog. Implemented fabric to…☆12Feb 12, 2019Updated 7 years ago
- ☆328Jan 23, 2026Updated 8 months ago
- FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation☆123May 11, 2023Updated 3 years ago
- 乱序双发处理器,在2024年计算机系统能力大赛CPU 赛道(龙芯杯)获二等奖,全国第四☆24Aug 20, 2024Updated 2 years ago
- Tightly-coupled cache coherence unit for CVA6 using the ACE protocol☆39May 4, 2024Updated 2 years ago
- Single issue, 5-stage pipeline LoongArch CPU. Supports forwarding, exception and interrupt handling, cache, TLB MMU, and a streamlined AX…☆10Sep 29, 2023Updated 3 years ago
- ☆12Sep 18, 2024Updated 2 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- CNN accelerator using NoC architecture☆18Dec 6, 2018Updated 7 years ago
- CS533 Course Project (ongoing) - Exploring Parallel Architectures for Neural Processing Unit Implementations☆22May 4, 2017Updated 9 years ago
- A fork of Xiangshan for AI☆62Updated this week
- Hardware design with Chisel☆36Feb 9, 2023Updated 3 years ago
- Hardware acceleration for transformer attention mechanisms on NVIDIA Deep Learning Accelerator (NVDLA), enabling efficient inference of…☆20Mar 30, 2025Updated last year
- PULP C910, a superscalar out-of-order RISC-V core adapted from T-Head's openC910 (Alibaba Group) and integrated into the PULP ecosystem w…☆21Aug 25, 2026Updated last month
- A Vibed GPU written in SpinalHDL☆18Mar 31, 2026Updated 6 months ago