An LSTM template and a few examples using Vivado HLS
☆48May 4, 2024Updated 2 years ago
Alternatives and similar repositories for RNN_HLS
Users that are interested in RNN_HLS are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- SAMO: Streaming Architecture Mapping Optimisation☆36Oct 4, 2023Updated 3 years ago
- ☆15Oct 26, 2023Updated 2 years ago
- ☆22Sep 27, 2022Updated 4 years ago
- ☆19Jan 22, 2025Updated last year
- DASS HLS Compiler☆30Oct 4, 2023Updated 3 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- An LLVM pass to prove that an II works for the given loop for Vitis HLS☆11Aug 22, 2021Updated 5 years ago
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆99Oct 2, 2021Updated 5 years ago
- Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)☆63Mar 17, 2022Updated 4 years ago
- Lenet for MNIST handwritten digit recognition using Vivado hls tool☆38Jul 22, 2020Updated 6 years ago
- Performance and resource models for fpgaConvNet: a Streaming-Architecture-based CNN Accelerator.☆36Nov 7, 2024Updated last year
- ☆11Nov 5, 2019Updated 6 years ago
- This is the first step to implement RNN on FPGAs. All modules are heavily commented. We will use High-Level Synthesis to turn these code …☆24Jun 28, 2019Updated 7 years ago
- ☆69May 6, 2020Updated 6 years ago
- FPGA-based hardware acceleration for dropout-based Bayesian Neural Networks.☆28Aug 15, 2023Updated 3 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- A formally verified high-level synthesis tool based on CompCert and written in Coq.☆100Jan 29, 2026Updated 8 months ago
- An implementation of a BinaryConnect network for cifar10☆11Nov 4, 2019Updated 6 years ago
- ☆18Oct 29, 2021Updated 4 years ago
- High-level synthesis (HLS) implementation of Sparse Matrix Vector Multiplication☆20Feb 17, 2022Updated 4 years ago
- MNIST accelerator using binary qunatization on Xilinx pynq-z2☆14Sep 4, 2024Updated 2 years ago
- This repository contains the hardware implementation for Static BFP convolution on FPGA☆10Oct 15, 2019Updated 6 years ago
- Fast inference of Boosted Decision Trees in FPGAs☆63Oct 6, 2026Updated last week
- Vitis HLS Library for FINN☆229Oct 5, 2026Updated last week
- Train and deploy LUT-based neural networks on FPGAs☆122Jun 12, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆92Apr 15, 2020Updated 6 years ago
- implementing a Recurrent Neural Network with binarized weight format on FPGA☆22Sep 3, 2017Updated 9 years ago
- [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.☆127Jan 3, 2023Updated 3 years ago
- On the Effects of Quantisation on Model Uncertainty in Bayesian Neural Networks