Alternatives and similar repositories for gnn-builder:

Users that are interested in gnn-builder are comparing it to the libraries listed below

• jasonlin316 / GCN-Inference-Acceleration-HLS
  An end-to-end GCN inference accelerator written in HLS
  ☆19Updated 2 years ago
• Xtra-Computing / ReGraph
  Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines
  ☆17Updated 2 years ago
• lsq314 / SpMM_TCAD
  ☆13Updated 4 months ago
• GraphSAINT / GNN-ARCH
  [ASAP 2020; FPGA 2020] Hardware architecture to accelerate GNNs (common IP modules for minibatch training and full batch inference)
  ☆41Updated 3 years ago
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆67Updated 3 years ago
• synergy-noc-generators / Proteus
  ☆9Updated last year
• sharc-lab / DGNN-Booster
  ☆16Updated last year
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆41Updated 2 years ago
• yhqiu16 / TRAM
  Template-based Reconfigurable Architecture Modeling Framework
  ☆13Updated 2 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆84Updated 3 months ago
• pgroupATusc / GraphACT
  Implementation of paper "GraphACT: Accelerating GCN Training on CPU-FPGA Heterogeneous Platform".
  ☆10Updated 4 years ago
• ecolab-nus / morpher-v2
  An Open-Source Tool for CGRA Accelerators
  ☆18Updated 8 months ago
• sfu-arch / SPAGHETTI
  RTL generator for SpGEMM
  ☆9Updated 3 years ago
• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆46Updated this week
• arc-research-lab / SSR
  SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)
  ☆27Updated 5 months ago
• SFU-HiAccel / HiSpMV
  [FPGA 2024]FPGA Accelerator for Imbalanced SpMV using HLS
  ☆8Updated this week
• sharc-lab / FlowGNN
  A dataflow architecture for universal graph neural network inference via multi-queue streaming.
  ☆68Updated 2 years ago
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆40Updated 10 months ago
• FCAS-LAB / chiplet_simulators
  A list of our chiplet simulaters
  ☆26Updated 3 years ago
• KULeuven-MICAS / zigzag-imc
  HW accelerator mapping optimization framework for in-memory computing
  ☆21Updated this week
• UCLA-VAST / Serpens
  Serpens is an HBM FPGA accelerator for SpMV
  ☆17Updated 5 months ago
• maestro-project / magma
  ☆16Updated 2 years ago
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆45Updated 2 years ago
• maeri-project / FEATHER
  A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
  ☆43Updated 3 months ago
• UCLA-VAST / FlexCNN
  ☆71Updated last year
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆75Updated 5 months ago
• AlbertoParravicini / approximate-spmv-topk
  Public repostory for the DAC 2021 paper "Scaling up HBM Efficiency of Top-K SpMV forApproximate Embedding Similarity on FPGAs"
  ☆14Updated 3 years ago
• KULeuven-MICAS / DeFiNES
  A framework for fast exploration of the depth-first scheduling space for DNN accelerators
  ☆35Updated last year
• ecolab-nus / morpher
  An Open-Source Tool for CGRA Accelerators
  ☆58Updated last week
• CRAFT-THU / XB-Sim
  A Unified Framework for Training, Mapping and Simulation of ReRAM-Based Convolutional Neural Network Acceleration
  ☆33Updated 2 years ago