Alternatives and similar repositories for conifer:

Users that are interested in conifer are comparing it to the libraries listed below

• awai54st / LUTNet
  ☆56Updated 4 years ago
• FPGA4HEP / course_material
  ☆35Updated 5 years ago
• Xilinx / logicnets
  ☆83Updated 7 months ago
• MakarenaLabs / Xilinx-FPGA-HLS-PYNQ-ALVEO-Flow
  Simple examples for FPGA design using Vivado HLS for high level synthesis and Vivado for bitstream generation.
  ☆27Updated 4 years ago
• Licheng-Guo / vivado-hls-broadcast-optimization
  [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency
  ☆32Updated 3 years ago
• AlexMontgomerie / samo
  SAMO: Streaming Architecture Mapping Optimisation
  ☆32Updated last year
• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆188Updated last month
• Xilinx / finn-base
  Open Source Compiler Framework using ONNX as Frontend and IR
  ☆29Updated 2 years ago
• Xilinx / ResNet50-PYNQ
  Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ
  ☆54Updated 3 years ago
• walkieq / RNN_HLS
  An LSTM template and a few examples using Vivado HLS
  ☆43Updated 8 months ago
• rapidstream-org / rapidstream-tapa
  RapidStream TAPA compiles task-parallel HLS program into high-frequency FPGA accelerators.
  ☆164Updated this week
• Xilinx / DSP-PYNQ
  A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+
  ☆38Updated 2 years ago
• Xilinx / Alveo-PYNQ
  Introductory examples for using PYNQ with Alveo
  ☆49Updated last year
• Xilinx / PYNQ_Composable_Pipeline
  PYNQ Composabe Overlays
  ☆69Updated 7 months ago
• ehw-fit / evoapproxlib
  Library of approximate arithmetic circuits
  ☆53Updated 2 years ago
• fastmachinelearning / models
  Models and examples built with hls4ml
  ☆12Updated 4 years ago
• KastnerRG / cgra4ml
  An Open Workflow to Build Custom SoCs and run Deep Models at the Edge
  ☆69Updated last month
• Xilinx / finn-examples
  Dataflow QNN inference accelerator examples on FPGAs
  ☆195Updated this week
• lite-david / comet
  RISC-V ISA based 32-bit processor written in HLS
  ☆17Updated 5 years ago
• Xilinx / RFNoC-HLS-NeuralNet
  ☆104Updated 5 years ago
• calad0i / HGQ
  High Granularity Quantizarion for Ultra-Fast Machine Learning Applications on FPGAs
  ☆17Updated 5 months ago
• fastmachinelearning / hls4ml-tutorial
  Tutorial notebooks for hls4ml
  ☆313Updated last week
• UCLA-VAST / AutoBridge
  [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.
  ☆123Updated 2 years ago
• MicrochipTech / fpga-hls-examples
  Open-Source HLS Examples for Microchip FPGAs
  ☆40Updated last month
• MartaAndronic / PolyLUT
  PolyLUT is the first quantized neural network training methodology that maps a neuron to a LUT while using multivariate polynomial functi…
  ☆45Updated 11 months ago
• makslevental / openhls
  PyTorch model to RTL flow for low latency inference
  ☆123Updated 10 months ago
• Xilinx / xup_compute_acceleration
  Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware
  ☆46Updated 5 months ago
• maltanar / qnn-inference-examples
  Jupyter notebook examples on image classification with quantized neural networks
  ☆69Updated 4 years ago
• template-hls / template-hls-float
  ☆27Updated 5 years ago
• UCLA-VAST / FlexCNN
  ☆71Updated last year