thesps / coniferLinks
Fast inference of Boosted Decision Trees in FPGAs
☆55Updated last month
Alternatives and similar repositories for conifer
Users that are interested in conifer are comparing it to the libraries listed below
Sorting:
- Train and deploy LUT-based neural networks on FPGAs☆97Updated last year
- ☆58Updated 5 years ago
- ☆34Updated 5 years ago
- Introductory examples for using PYNQ with Alveo☆51Updated 2 years ago
- An LSTM template and a few examples using Vivado HLS☆45Updated last year
- Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ☆58Updated 3 years ago
- SAMO: Streaming Architecture Mapping Optimisation☆33Updated last year
- Simple examples for FPGA design using Vivado HLS for high level synthesis and Vivado for bitstream generation.☆30Updated 5 years ago
- Models and examples built with hls4ml☆12Updated 5 years ago
- Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".☆200Updated 3 years ago
- Vitis HLS Library for FINN☆202Updated this week
- An Open Workflow to Build Custom SoCs and run Deep Models at the Edge☆85Updated last month
- Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware☆48Updated 11 months ago
- Open Source Compiler Framework using ONNX as Frontend and IR☆32Updated 2 years ago
- NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functions☆37Updated 3 months ago
- Performance and resource models for fpgaConvNet: a Streaming-Architecture-based CNN Accelerator.☆29Updated 8 months ago
- High Granularity Quantizarion for Ultra-Fast Machine Learning Applications on FPGAs☆31Updated 3 months ago
- Dataflow QNN inference accelerator examples on FPGAs☆222Updated 3 months ago
- [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency☆32Updated 4 years ago
- ☆29Updated 6 years ago
- Jupyter notebook examples on image classification with quantized neural networks☆69Updated 5 years ago
- ☆108Updated 5 years ago
- [FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.☆126Updated 2 years ago
- PYNQ Bootcamp 2019-2024 teaching materials.☆48Updated 7 months ago
- ☆30Updated 8 months ago
- Matrix Operation Library for FPGA https://xilinx.github.io/gemx/☆63Updated 5 years ago
- ☆23Updated 2 years ago
- PYNQ Composabe Overlays☆73Updated last year
- Tutorials on HLS Design☆52Updated 5 years ago
- A Tutorial on Putting High-Level Synthesis cores in PYNQ☆105Updated 7 years ago