Alternatives and similar repositories for BNN:

Users that are interested in BNN are comparing it to the libraries listed below

• canteen-man / CNN_FPGA_ZYNQ_PYNQ
  hls code zynq 7020 pynq z2 CNN
  ☆79Updated 5 years ago
• ignperez-udec / MobileNet-V2-inference-HLS
  Codes to implement MobileNet V2 in a FPGA
  ☆24Updated 4 years ago
• sherylll / lenet5-accelerator
  FPGA and GPU acceleration of LeNet5
  ☆35Updated 5 years ago
• user-xleo / DNN-Accelerator
  A DNN Accelerator implemented with RTL.
  ☆63Updated last week
• ralbertazzi / bnn
  Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools
  ☆47Updated 6 years ago
• a2824256 / HLS-LeNet
  The CNN based on the Xilinx Vivado HLS
  ☆37Updated 3 years ago
• snagiri / CSE237D-PYNQ-SNN-Accelerator
  Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board
  ☆32Updated 5 years ago
• jiangwx / SkrSkr
  The second place winner for DAC-SDC 2020
  ☆96Updated 2 years ago
• FloyedShen / mnist_hls
  Lenet for MNIST handwritten digit recognition using Vivado hls tool
  ☆36Updated 4 years ago
• mfarhadi / CNNIOT
  ☆43Updated 6 years ago
• GeneralZDS / FPGA-DCNN-Accelerator
  基于HLS的高效深度卷积神经网络FPGA实现方法
  ☆69Updated 5 years ago
• eda-lab / CNNAF-CNN-Accelerator_init
  CNN-Accelerator based on FPGA developed by verilog HDL.
  ☆45Updated 4 years ago
• Microdent / Handwritten_Mathematical_Calculator_on_FPGA
  A simple demo to implement the Handwritten Mathematical Calculator on PYNQ-Z2 FPGA platform by using HLS.
  ☆37Updated 4 years ago
• ZhaoqxCN / PYNQ-CNN-ATTEMPT
  Some attempts to build CNN on PYNQ.
  ☆24Updated 5 years ago
• patryk-oleniuk / cnn_hw_accelerator
  FPGA accelerator and port of the emotion recognition CNN running in C on Xilinx ZYNQ
  ☆19Updated 5 years ago
• mohdumar644 / TinyYOLO-BNN
  Example of Tiny YOLO deployed using Xilinx BNN-PYNQ.
  ☆31Updated 5 years ago
• manoharvhr / PYNQ-Torch
  PYNQ-Torch: a framework to develop PyTorch accelerators on the PYNQ platform
  ☆68Updated 4 years ago
• heheda365 / ultra_net
  FPGA-based neural network inference project for 2020 DAC System Design Contest
  ☆111Updated 3 years ago
• arasi15 / CNN-Accelerator-Implementation-based-on-Eyerissv2
  ☆98Updated 4 years ago
• williamyang4978 / PipeCNN_Winograd
  An OpenCL-Based FPGA Accelerator for Compressed YOLOv2
  ☆36Updated 3 years ago
• hisrg / PYNQ_CNN_Accelerator_Tutorial
  中文：
  ☆94Updated 5 years ago
• WenqiJiang / VGG16_FPGA_Accelerator
  A VGG accelerator by System Verilog on DE1-SoC FPGA. Row Stationary (RS) dataflow is adopted, and computations are based on fixed point 1…
  ☆30Updated 5 years ago
• CASR-HKU / MSD-FCCM23
  Open-source of MSD framework
  ☆16Updated last year
• jonathan93sh / CNNA
  A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA
  ☆22Updated 3 years ago
• dhm2013724 / Xilinx_FPGA_HLS-Mapping-Neural-Network-to-Hardware
  At present, just an example to show how to map the detection algorithm YOLOv2 from model to FPGA
  ☆31Updated 6 years ago
• qixingzhang / SummerSchool2022-Vitis-AI
  Vitis AI Lab: MNIST classifier
  ☆17Updated 2 years ago
• cornell-zhang / FracBNN
  FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations
  ☆89Updated 3 years ago
• OpenHEC / SNN-simulator-on-PYNQcluster
  ☆87Updated 4 years ago
• mayshin10 / CNN-Accelerator
  Designing CNN accelerator using a Xilinx FPGA board and comparing performance with CPU.
  ☆21Updated 3 years ago
• JinChen-tw / pynqz2_dpu140
  This TRD is implement DPU v1.4.0 on PYNQ-Z2 board
  ☆44Updated 4 years ago