Alternatives and similar repositories for brevitas-radioml-challenge-21

Users that are interested in brevitas-radioml-challenge-21 are comparing it to the libraries listed below

• da-steve101 / radio_modulation
  Classify modulation of signals
  ☆15Updated 6 years ago
• da-steve101 / twn_generator
  Generate an FPGA design for a TWN
  ☆10Updated 6 years ago
• louisinhit / CNN-for-modulation-recognition-based-on-FPGA
  ☆24Updated 3 years ago
• Xilinx / RFNoC-HLS-NeuralNet
  ☆109Updated 6 years ago
• Xilinx / ResNet50-PYNQ
  Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ
  ☆59Updated 4 years ago
• walkieq / RNN_HLS
  An LSTM template and a few examples using Vivado HLS
  ☆46Updated last year
• Xilinx / PYNQ-ZU
  PYNQ-ZU, AUP UltraScale+ MPSoC academic board
  ☆28Updated 3 months ago
• nikulshr / resnet_fpga
  UCSD CSE 237D Spring '20 Course Project
  ☆19Updated 2 years ago
• Xilinx / DSP-PYNQ
  A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+
  ☆40Updated 3 years ago
• awai54st / LUTNet
  ☆65Updated 5 years ago
• enyac-group / MaxEVA
  MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine (accepted as full paper at FPT'23)
  ☆21Updated last year
• asadalam / FINN_MatrixVector_RTL
  Repository for work on on Xilinx's matrix vector activation unit's RTL implementation. Documentation available at: https://asadalam.githu…
  ☆19Updated 4 years ago
• AlexMontgomerie / fpgaconvnet-model
  Performance and resource models for fpgaConvNet: a Streaming-Architecture-based CNN Accelerator.
  ☆32Updated last year
• JennySmith888 / 100GBE-PYNQ
  ☆19Updated 4 years ago
• MakarenaLabs / Xilinx-FPGA-HLS-PYNQ-ALVEO-Flow
  Simple examples for FPGA design using Vivado HLS for high level synthesis and Vivado for bitstream generation.
  ☆31Updated 5 years ago
• Xilinx / logicnets
  Train and deploy LUT-based neural networks on FPGAs
  ☆106Updated last year
• maltanar / qnn-inference-examples
  Jupyter notebook examples on image classification with quantized neural networks
  ☆71Updated 5 years ago
• MartaAndronic / NeuraLUT
  NeuraLUT-Assemble
  ☆47Updated 5 months ago
• fastmachinelearning / models
  Models and examples built with hls4ml
  ☆12Updated 5 years ago
• manoharvhr / PYNQ-Torch
  PYNQ-Torch: a framework to develop PyTorch accelerators on the PYNQ platform
  ☆75Updated 5 years ago
• thesps / conifer
  Fast inference of Boosted Decision Trees in FPGAs
  ☆57Updated last week
• AlexMontgomerie / samo
  SAMO: Streaming Architecture Mapping Optimisation
  ☆34Updated 2 years ago
• MartaAndronic / PolyLUT
  PolyLUT is the first quantized neural network training methodology that maps a neuron to a LUT while using multivariate polynomial functi…
  ☆55Updated last year
• Xilinx / PYNQ_Bootcamp
  PYNQ Bootcamp 2019-2024 teaching materials.
  ☆52Updated last year
• DSDL-EE / PYNQ-ZU_Tutorial
  ☆13Updated 2 years ago
• KastnerRG / Read_the_docs
  Projects and Labs for the Parallel Programming for FPGAs book
  ☆20Updated last month
• valar1234 / SDAI
  An Synthesizable Deep Learning Library based on Xilinx High Level Synthesis(HLS) tool
  ☆16Updated 8 years ago
• rehohoho / onnx2versal
  Generate versal system design from ONNX model. AI engine kernels. Sub-microsecond speeds for autoencoders.
  ☆16Updated last year
• chuliang007 / resnet20_training
  ☆11Updated last year
• os-hxfan / BayesNN_FPGA
  FPGA-based hardware acceleration for dropout-based Bayesian Neural Networks.
  ☆27Updated 2 years ago