Alternatives and similar repositories for brevitas-radioml-challenge-21

Users that are interested in brevitas-radioml-challenge-21 are comparing it to the libraries listed below

• da-steve101 / radio_modulation
  Classify modulation of signals
  ☆15Updated 5 years ago
• da-steve101 / twn_generator
  Generate an FPGA design for a TWN
  ☆10Updated 5 years ago
• walkieq / RNN_HLS
  An LSTM template and a few examples using Vivado HLS
  ☆45Updated last year
• Xilinx / RFNoC-HLS-NeuralNet
  ☆109Updated 6 years ago
• AlexMontgomerie / fpgaconvnet-hls
  ☆31Updated 10 months ago
• Xilinx / ResNet50-PYNQ
  Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ
  ☆59Updated 3 years ago
• louisinhit / CNN-for-modulation-recognition-based-on-FPGA
  ☆19Updated 2 years ago
• QDucasse / nn_benchmark
  🧠 Benchmark facility to train networks on different datasets for PyTorch/Brevitas
  ☆26Updated 2 years ago
• awai54st / LUTNet
  ☆60Updated 5 years ago
• os-hxfan / BayesNN_FPGA
  FPGA-based hardware acceleration for dropout-based Bayesian Neural Networks.
  ☆26Updated 2 years ago
• AlexMontgomerie / samo
  SAMO: Streaming Architecture Mapping Optimisation
  ☆34Updated last year
• asadalam / FINN_MatrixVector_RTL
  Repository for work on on Xilinx's matrix vector activation unit's RTL implementation. Documentation available at: https://asadalam.githu…
  ☆17Updated 3 years ago
• elliothe / N3H_Core
  [FPGA-2022] N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores
  ☆12Updated 3 years ago
• enyac-group / MaxEVA
  MaxEVA: Maximizing the Efficiency of Matrix Multiplication on Versal AI Engine (accepted as full paper at FPT'23)
  ☆21Updated last year
• Xilinx / PYNQ-ZU
  PYNQ-ZU, AUP UltraScale+ MPSoC academic board
  ☆27Updated last month
• MartaAndronic / PolyLUT
  PolyLUT is the first quantized neural network training methodology that maps a neuron to a LUT while using multivariate polynomial functi…
  ☆53Updated last year
• DNN-Accelerators / Open-Source-IPs
  ☆34Updated 6 years ago
• Xilinx / logicnets
  Train and deploy LUT-based neural networks on FPGAs
  ☆98Updated last year
• fastmachinelearning / models
  Models and examples built with hls4ml
  ☆12Updated 5 years ago
• maltanar / qnn-inference-examples
  Jupyter notebook examples on image classification with quantized neural networks
  ☆69Updated 5 years ago
• weierwan / Neurram_48core
  Verilog and Python drivers and APIs for Neurram 48-core chip
  ☆40Updated 3 years ago
• yuehniu / CNN.frequencyFPGA
  CNN Accelerator in Frequency Domain
  ☆12Updated 5 years ago
• thesps / conifer
  Fast inference of Boosted Decision Trees in FPGAs
  ☆55Updated 2 weeks ago
• fpgasystems / ZipML-PYNQ
  Linear model training using stochastic gradient descent (SGD) on PYNQ with full to low precision.
  ☆55Updated 7 years ago
• manoharvhr / PYNQ-Torch
  PYNQ-Torch: a framework to develop PyTorch accelerators on the PYNQ platform
  ☆72Updated 5 years ago
• jonathan93sh / CNNA
  A generic Convolutional Neural Network (CNN) Accelerator (CNNA) for FPGA
  ☆26Updated 3 years ago
• Xilinx / PYNQ_Bootcamp
  PYNQ Bootcamp 2019-2024 teaching materials.
  ☆48Updated 8 months ago
• kkiningh / cs231n-project
  CNN accelerator
  ☆27Updated 8 years ago
• lirui-shanghaitech / A-convolution-kernel-implemented-by-Vivado-HLS
  This project implements a convolution kernel based on vivado HLS on zcu104
  ☆37Updated 5 years ago
• AlexMontgomerie / fpgaconvnet-model
  Performance and resource models for fpgaConvNet: a Streaming-Architecture-based CNN Accelerator.
  ☆30Updated 10 months ago