AlexMontgomerie / fpgaconvnet-modelLinks
Performance and resource models for fpgaConvNet: a Streaming-Architecture-based CNN Accelerator.
☆33Updated last year
Alternatives and similar repositories for fpgaconvnet-model
Users that are interested in fpgaconvnet-model are comparing it to the libraries listed below
Sorting:
- Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ☆59Updated 4 years ago
- An LSTM template and a few examples using Vivado HLS☆47Updated last year
- A collection of tutorials for the fpgaConvNet framework.☆47Updated last year
- Train and deploy LUT-based neural networks on FPGAs☆106Updated last year
- ☆65Updated 5 years ago
- ☆72Updated 2 years ago
- ☆32Updated last year
- NeuraLUT-Assemble☆47Updated 5 months ago
- This repository provides an FPGA-based solution for executing object detection, focusing specifically on the popular YOLOv5 model archite…☆50Updated 2 weeks ago
- Vitis HLS Library for FINN☆213Updated 3 weeks ago
- PolyLUT is the first quantized neural network training methodology that maps a neuron to a LUT while using multivariate polynomial functi…☆55Updated last year
- HLS implemented systolic array structure☆41Updated 8 years ago
- Verilog implementation of Softmax function☆78Updated 3 years ago
- An HLS based winograd systolic CNN accelerator☆54Updated 4 years ago
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆97Updated 4 years ago
- Repository for work on on Xilinx's matrix vector activation unit's RTL implementation. Documentation available at: https://asadalam.githu…☆19Updated 4 years ago
- PyTorch implementation of DiracDeltaNet from paper Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs☆33Updated 6 years ago
- An Open Workflow to Build Custom SoCs and run Deep Models at the Edge☆104Updated 2 weeks ago
- Convolutional Neural Network Using High Level Synthesis☆90Updated 5 years ago
- Hardware accelerator for convolutional neural networks☆64Updated 3 years ago
- This project implements a convolution kernel based on vivado HLS on zcu104☆36Updated 5 years ago
- CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture☆162Updated this week
- ☆35Updated 6 years ago
- ☆45Updated this week
- ☆72Updated 7 years ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆92Updated last year
- SAMO: Streaming Architecture Mapping Optimisation☆34Updated 2 years ago
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆50Updated 11 months ago
- A Convolutional Neural Network (CNN) hardware accelerator for image recognition☆14Updated 6 years ago
- DPU on PYNQ☆241Updated 5 months ago