Alternatives and similar repositories for fpgaconvnet-model:

Users that are interested in fpgaconvnet-model are comparing it to the libraries listed below

• AlexMontgomerie / fpgaconvnet-hls
  ☆28Updated 4 months ago
• AlexMontgomerie / fpgaconvnet-tutorial
  A collection of tutorials for the fpgaConvNet framework.
  ☆40Updated 6 months ago
• awai54st / LUTNet
  ☆57Updated 4 years ago
• xliu0709 / WinoCNN
  An HLS based winograd systolic CNN accelerator
  ☆50Updated 3 years ago
• ptoupas / amd-open-hardware-23
  This repository provides an FPGA-based solution for executing object detection, focusing specifically on the popular YOLOv5 model archite…
  ☆40Updated last year
• 8krisv / CNN-ACCELERATOR
  Hardware accelerator for convolutional neural networks
  ☆40Updated 2 years ago
• Xilinx / ResNet50-PYNQ
  Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ
  ☆57Updated 3 years ago
• UCLA-VAST / FlexCNN
  ☆71Updated 2 years ago
• Kareem-Emad / DCNN-Accelerator
  Low level design of a chip built for optimizing/accelerating CNN classifiers over gray scale images.
  ☆12Updated 5 years ago
• Xilinx / logicnets
  ☆87Updated 9 months ago
• ac-optimus / Convolution-using-systolic-arrays
  ☆63Updated 6 years ago
• walkieq / RNN_HLS
  An LSTM template and a few examples using Vivado HLS
  ☆44Updated 10 months ago
• yuyuranium / FPGA-Project-2022-simple-tpu
  Systolic array based simple TPU for CNN on PYNQ-Z2
  ☆29Updated 2 years ago
• AlexMontgomerie / samo
  SAMO: Streaming Architecture Mapping Optimisation
  ☆32Updated last year
• jgoeders / dac_sdc_2020_designs
  Designs for finalist teams of the DAC System Design Contest
  ☆37Updated 4 years ago
• yuehniu / CNN.frequencyFPGA
  CNN Accelerator in Frequency Domain
  ☆12Updated 5 years ago
• DPCEKY / systolic-array
  HLS implemented systolic array structure
  ☆41Updated 7 years ago
• sharc-lab / HLSFactory
  HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond
  ☆33Updated 2 weeks ago
• eda-lab / CNNAF-CNN-Accelerator
  CNN-Accelerator based on FPGA developed by verilog HDL.
  ☆10Updated 3 years ago
• kmanev / ZynqUSp-AXI-Speedtest
  ☆14Updated 5 years ago
• BoooC / CNN-Accelerator-Based-on-Eyeriss-v2
  A Flexible and Energy Efficient Accelerator For Sparse Convolution Neural Network
  ☆56Updated last month
• VincentWang1998 / ai_on_chip_project1
  tpu-systolic-array-weight-stationary
  ☆23Updated 3 years ago
• pulp-platform / stream-ebpc
  Provides the hardware code for the paper "EBPC: Extended Bit-Plane Compression for Deep Neural Network Inference and Training Accelerator…
  ☆24Updated 4 years ago
• Xilinx / PYNQ_Composable_Pipeline
  PYNQ Composabe Overlays
  ☆70Updated 9 months ago
• sherylll / lenet5-accelerator
  FPGA and GPU acceleration of LeNet5
  ☆35Updated 5 years ago
• eda-lab / CNNAF-CNN-Accelerator_init
  CNN-Accelerator based on FPGA developed by verilog HDL.
  ☆47Updated 4 years ago
• racosa / cnn-accelerator
  A Convolutional Neural Network (CNN) hardware accelerator for image recognition
  ☆12Updated 5 years ago
• harvard-acc / FlexASR
  FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks
  ☆41Updated last month
• abdelfattah-lab / BRAMAC
  ☆10Updated 4 months ago
• kkiningh / cs231n-project
  CNN accelerator
  ☆28Updated 7 years ago