AlexMontgomerie / samo
SAMO: Streaming Architecture Mapping Optimisation
☆32Updated last year
Alternatives and similar repositories for samo:
Users that are interested in samo are comparing it to the libraries listed below
- A collection of tutorials for the fpgaConvNet framework.☆40Updated 5 months ago
- ☆71Updated 2 years ago
- Designs for finalist teams of the DAC System Design Contest☆36Updated 4 years ago
- ☆28Updated 4 months ago
- An HLS based winograd systolic CNN accelerator☆50Updated 3 years ago
- ☆57Updated 4 years ago
- [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency☆32Updated 4 years ago
- ☆23Updated 2 years ago
- Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ☆56Updated 3 years ago
- ☆27Updated 5 years ago
- ☆25Updated 2 months ago
- Performance and resource models for fpgaConvNet: a Streaming-Architecture-based CNN Accelerator.☆29Updated 4 months ago
- ☆70Updated 4 years ago
- An LSTM template and a few examples using Vivado HLS☆44Updated 10 months ago
- PolyLUT is the first quantized neural network training methodology that maps a neuron to a LUT while using multivariate polynomial functi…☆49Updated last year
- HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond☆31Updated last week
- FPGA-based hardware acceleration for dropout-based Bayesian Neural Networks.☆23Updated last year
- Approximate layers - TensorFlow extension☆27Updated 10 months ago
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆42Updated 2 weeks ago
- [ICML 2021] "Auto-NBA: Efficient and Effective Search Over the Joint Space of Networks, Bitwidths, and Accelerators" by Yonggan Fu, Yonga…☆15Updated 3 years ago
- ☆19Updated 3 years ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆45Updated 2 years ago
- ☆32Updated 4 years ago
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆91Updated 3 years ago
- ☆33Updated 6 years ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆77Updated 7 months ago
- A DAG processor and compiler for a tree-based spatial datapath.☆13Updated 2 years ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆63Updated 3 years ago
- ☆20Updated 2 years ago
- ☆15Updated 4 years ago