Alternatives and similar repositories for LSTM-PYNQ:

Users that are interested in LSTM-PYNQ are comparing it to the libraries listed below

• drichmond / PYNQ-HLS
  A Tutorial on Putting High-Level Synthesis cores in PYNQ
  ☆103Updated 6 years ago
• Xilinx / ResNet50-PYNQ
  Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ
  ☆55Updated 3 years ago
• hillhao / PYNQ-project
  PYNQ, Neural network Language model, Overlay
  ☆105Updated 5 years ago
• onioncc / iSmartDNN
  Light-weighted neural network inference for object detection on small-scale FPGA board
  ☆91Updated 5 years ago
• amiq-consulting / CNN-using-HLS
  Convolutional Neural Network Using High Level Synthesis
  ☆84Updated 4 years ago
• WenqiJiang / FPGA-Based-RNN-Accelerator-Using-Vivado-HLS
  This is the first step to implement RNN on FPGAs. All modules are heavily commented. We will use High-Level Synthesis to turn these code …
  ☆22Updated 5 years ago
• heheda365 / ultra_net
  FPGA-based neural network inference project for 2020 DAC System Design Contest
  ☆111Updated 3 years ago
• pp-Innovate / FPGA-ZynqNet
  FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS
  ☆107Updated 7 years ago
• cea-wind / SimpleTPU
  A FPGA Based CNN accelerator, following Google's TPU V1.
  ☆132Updated 5 years ago
• sherylll / lenet5-accelerator
  FPGA and GPU acceleration of LeNet5
  ☆35Updated 5 years ago
• mohdumar644 / TinyYOLO-BNN
  Example of Tiny YOLO deployed using Xilinx BNN-PYNQ.
  ☆31Updated 5 years ago
• canteen-man / CNN_FPGA_ZYNQ_PYNQ
  hls code zynq 7020 pynq z2 CNN
  ☆79Updated 5 years ago
• Xilinx / PYNQ-DL
  Xilinx Deep Learning IP
  ☆92Updated 3 years ago
• ilaydayaman / CNN_for_SLR
  A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.
  ☆90Updated last year
• g0kul / vcnn
  Verilog Convolutional Neural Network on PYNQ
  ☆28Updated 6 years ago
• ralbertazzi / bnn
  Training and Implementation of a CNN for image classification with binary weights and activations on FPGA with HLS tools
  ☆47Updated 6 years ago
• mohaghasemzadeh / ReBNet
  Residual Binarized Neural Network
  ☆44Updated 6 years ago
• HWAC-DL / hwac_object_tracker
  FPGA accelerated TinyYOLO v2 object detection neural network
  ☆69Updated 6 years ago
• Xilinx / RFNoC-HLS-NeuralNet
  ☆104Updated 5 years ago
• ac-optimus / Convolution-using-systolic-arrays
  ☆60Updated 6 years ago
• Xilinx / DPU-PYNQ
  DPU on PYNQ
  ☆209Updated last year
• romulus0914 / CNN_VGG19_verilog
  Convolution Neural Network of vgg19 model in verilog
  ☆46Updated 7 years ago
• JinChen-tw / pynqz2_dpu140
  This TRD is implement DPU v1.4.0 on PYNQ-Z2 board
  ☆44Updated 4 years ago
• hisrg / PYNQ_CNN_Accelerator_Tutorial
  中文：
  ☆95Updated 5 years ago
• mfarhadi / CNNIOT
  ☆43Updated 6 years ago
• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆189Updated 2 weeks ago
• leo47007 / TPU-Tensor-Processing-Unit
  IC implementation of TPU
  ☆97Updated 5 years ago
• alan4186 / Hardware-CNN
  A convolutional neural network implemented in hardware (verilog)
  ☆156Updated 7 years ago
• dhm2013724 / Xilinx_FPGA_HLS-Mapping-Neural-Network-to-Hardware
  At present, just an example to show how to map the detection algorithm YOLOv2 from model to FPGA
  ☆31Updated 6 years ago
• Xilinx / PYNQ-ComputerVision
  Computer Vision Overlays on Pynq
  ☆176Updated 5 years ago