LibreSilicon's Standard Cell Library Generator
☆22Oct 30, 2025Updated 4 months ago
Alternatives and similar repositories for StdCellLib
Users that are interested in StdCellLib are comparing it to the libraries listed below
Sorting:
- ☆20Nov 22, 2021Updated 4 years ago
- An SRAM IP Uniquely designed with open source tools. Static RAM is a type of random-access memory that uses latching circuitry (flip-flop…☆14Jul 22, 2020Updated 5 years ago
- Wavious Wlink☆12Oct 28, 2021Updated 4 years ago
- 32-bit RISC-V microcontroller☆12Sep 11, 2021Updated 4 years ago
- Copyleftist's Standard Cell Library☆101May 2, 2024Updated last year
- Design of 4KB(1024*32) SRAM with operating voltage 1.8v and access time < 2.5ns☆14Dec 8, 2020Updated 5 years ago
- SRAM build space for SKY130 provided by SkyWater.☆25Oct 20, 2021Updated 4 years ago
- https://caravel-mgmt-soc-litex.readthedocs.io/en/latest/☆29Jan 21, 2025Updated last year
- Gate-level visualization generator for SKY130-based chip designs.☆20Jul 22, 2021Updated 4 years ago
- AHB-Lite based SoC for IBEX/SWERV/VEXRISC/...☆13Mar 28, 2025Updated 11 months ago
- Reinforcement learning assisted analog layout design flow.☆27Jun 17, 2024Updated last year
- SRAM macros created for the GF180MCU provided by GlobalFoundries.☆19Apr 10, 2023Updated 2 years ago
- Tool to fetch and parse data about Efabless MPW projects☆15Jan 10, 2023Updated 3 years ago
- BAG (BAG AMS Generator) Primitives Library for SKY130☆20May 16, 2023Updated 2 years ago
- A current mode buck converter on the SKY130 PDK☆34Jun 17, 2021Updated 4 years ago
- Analog and power building blocks for sky130 pdk☆22Mar 3, 2021Updated 4 years ago
- SKY130 ReRAM and examples (SkyWater Provided)☆44Apr 20, 2022Updated 3 years ago
- ☆17Nov 4, 2024Updated last year
- Carrier for efabless Caravel chip used for Google/Skywater 130nm shuttle program.☆18Sep 24, 2021Updated 4 years ago
- ☆19Oct 28, 2024Updated last year
- ☆18Dec 15, 2022Updated 3 years ago
- System on Chip toolkit for nMigen☆19Apr 29, 2020Updated 5 years ago
- ☆38Jul 11, 2022Updated 3 years ago
- Guides and templates for using open source RF design tools with the SkyWater SKY130 process.☆19Nov 13, 2020Updated 5 years ago
- Open source process design kit for 28nm open process☆72Apr 23, 2024Updated last year
- Standard Cell Library based Memory Compiler using FF/Latch cells☆164Nov 10, 2025Updated 3 months ago
- components and examples for creating radio ICs using the open skywater 130nm PDK☆19Nov 29, 2020Updated 5 years ago
- Minimal SKY130 example with self-checking LVS, DRC, and PEX☆24Jan 20, 2021Updated 5 years ago
- Easy access to OpenSource TCAD Tools☆44Dec 27, 2025Updated 2 months ago
- ☆12Feb 15, 2024Updated 2 years ago
- ☆44Jan 26, 2020Updated 6 years ago
- Open Analog Design Environment☆25May 19, 2023Updated 2 years ago
- JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.☆77Mar 28, 2025Updated 11 months ago
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆70Nov 26, 2025Updated 3 months ago
- ☆30Aug 19, 2019Updated 6 years ago
- This is the Google/EFabless/Skywater Caravel submission of an Analog Spiking Neuron Circuit. The submission also includes a SONOS transis…☆12Apr 21, 2023Updated 2 years ago
- Converting systemverilog to verilog.☆10Feb 15, 2018Updated 8 years ago
- ☆26Apr 24, 2021Updated 4 years ago
- An Amateur Radio Transceiver IC (2.4 / 5 / 10 GHz)☆73Oct 4, 2021Updated 4 years ago