Alternatives and similar repositories for caravel_mgmt_soc_litex

Users that are interested in caravel_mgmt_soc_litex are comparing it to the libraries listed below

• mattvenn / multi_project_tools
  tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles
  ☆36Updated 3 years ago
• christoph-weiser / mpw6
  submission repository for efabless mpw6 shuttle
  ☆31Updated 2 years ago
• efabless / caravel-lite
  ☆17Updated last year
• olofk / fusesocotb
  Quick'n'dirty FuseSoC+cocotb example
  ☆19Updated last year
• efabless / sky130_sram_macros_old
  ☆38Updated 3 years ago
• vsdip / vsdsram_sky130
  ☆41Updated 3 years ago
• westonb / sky130-analog
  Analog and power building blocks for sky130 pdk
  ☆22Updated 4 years ago
• mattvenn / librelane_summary
  ☆26Updated 4 months ago
• lnis-uofu / TIGFET-10nm-PDK
  An open source PDK using TIGFET 10nm devices.
  ☆55Updated 3 years ago
• diadatp / sky130_rf_tools
  Guides and templates for using open source RF design tools with the SkyWater SKY130 process.
  ☆19Updated 5 years ago
• antmicro / topwrap
  A Python package for generating HDL wrappers and top modules for HDL sources
  ☆56Updated this week
• FPGA-Research / eFPGA---RTL-to-GDS-with-SKY130
  This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk
  ☆37Updated 4 years ago
• iic-jku / SKY130_SAR-ADC1
  Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license
  ☆51Updated 10 months ago
• vsdip / vsdStdCellCharacterizer_sky130
  ☆20Updated 4 years ago
• vsdip / rvmyth_avsddac_interface
  ☆15Updated 4 years ago
• asicsforthemasses / LunaPnR
  LunaPnR is a place and router for integrated circuits
  ☆47Updated 6 months ago
• mattvenn / flipflop_demo
  Flip flop setup, hold & metastability explorer tool
  ☆52Updated 3 years ago
• asinghani / sky130-chip-vis
  Gate-level visualization generator for SKY130-based chip designs.
  ☆21Updated 4 years ago
• YosysHQ / padring
  A padring generator for ASICs
  ☆25Updated 2 years ago
• stineje / sky130RHBDlib
  Open-source RHBD (Radiation Hardened by Design) Standard-Cell Library for SKY130
  ☆13Updated this week
• snishizawa / libretto
  Characterizer
  ☆31Updated 2 months ago
• verilator / verilator_ext_tests
  Extended and external tests for Verilator testing
  ☆17Updated last week
• nickson-jose / vsdstdcelldesign
  This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…
  ☆78Updated 5 years ago
• antonblanchard / vlsiffra
  Create fast and efficient standard cell based adders, multipliers and multiply-adders.
  ☆120Updated 2 years ago
• AL-255 / Project-Yatsuhashi-Chip1
  ☆38Updated 3 years ago
• vsdip / avsddac_3v3_sky130_v1
  ☆13Updated 3 years ago
• b224hisl / rioschip
  ☆33Updated 3 years ago
• sgherbst / sky130-hello-world
  Minimal SKY130 example with self-checking LVS, DRC, and PEX
  ☆24Updated 5 years ago
• google / globalfoundries-pdks
  Index of the fully open source process design kits (PDKs) maintained by Google for GlobalFoundries technologies.
  ☆51Updated 3 years ago
• ucb-cs250 / caravel_fpga250
  FPGA250 aboard the eFabless Caravel
  ☆32Updated 5 years ago