Alternatives and similar repositories for StdCellLib

Users that are interested in StdCellLib are comparing it to the libraries listed below

• libresilicon / qtflow
  Free open source EDA tools
  ☆66Updated 5 years ago
• libresilicon / process
  ☆91Updated 5 years ago
• rubund / graywolf
  ☆112Updated 4 years ago
• gatecat / prjoxide
  Documenting Lattice's 28nm FPGA parts
  ☆142Updated last year
• f4pga / prjxray-db
  Project X-Ray Database: XC7 Series
  ☆67Updated 3 years ago
• efabless / caravel_mpw-one
  Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.
  ☆134Updated 3 years ago
• lakshmi-sathi / avsdpll_1v8
  8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving a 8x mu…
  ☆112Updated 3 years ago
• lip6 / coriolis
  Coriolis VLSI EDA Tool (LIP6)
  ☆65Updated last week
• tdene / synth_opt_adders
  Prefix tree adder space exploration library
  ☆57Updated 5 months ago
• f4pga / icestorm
  Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentaion (Reverse Engineered)
  ☆33Updated 3 years ago
• Ravenslofty / yosys-cookbook
  User-friendly explanation of Yosys options
  ☆113Updated 3 years ago
• olofk / subservient
  Small SERV-based SoC primarily for OpenMPW tapeout
  ☆42Updated 4 months ago
• google / sky90fd-pdk
  ☆111Updated 2 years ago
• cliffordwolf / PonyLink
  A single-wire bi-directional chip-to-chip interface for FPGAs
  ☆121Updated 8 years ago
• asinghani / sky130-chip-vis
  Gate-level visualization generator for SKY130-based chip designs.
  ☆19Updated 3 years ago
• IHP-GmbH / IHP-Open-DesignLib
  Open source designs developed with IHP 130nm BiCMOS Open Source PDK. Documentation at https://ihp-open-ip.readthedocs.io/en/latest/
  ☆47Updated last month
• pieter3d / simview
  ☆78Updated last year
• antonblanchard / vlsiffra
  Create fast and efficient standard cell based adders, multipliers and multiply-adders.
  ☆114Updated last year
• efabless / chipignite-resources
  ☆79Updated 2 years ago
• leviathanch / qtflow
  A Qt5 based free VLSI development tool
  ☆30Updated 6 years ago
• RTimothyEdwards / qrouter
  Qrouter detail router for digital ASIC designs
  ☆57Updated last month
• fusesoc / fusesoc-cores
  FuseSoC standard core library
  ☆136Updated last month
• yrrapt / amsat_txrx_ic
  An Amateur Radio Transceiver IC (2.4 / 5 / 10 GHz)
  ☆72Updated 3 years ago
• RTimothyEdwards / netgen
  Netgen complete LVS tool for comparing SPICE or verilog netlists
  ☆116Updated last month
• chipsalliance / fpga-tool-perf
  FPGA tool performance profiling
  ☆102Updated last year
• clairexen / picorv
  PicoRV
  ☆44Updated 5 years ago
• f4pga / prjuray
  Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.
  ☆76Updated 3 years ago
• amaranth-lang / amaranth-soc
  System on Chip toolkit for Amaranth HDL
  ☆89Updated 7 months ago
• lachlansneff / ligeia
  A replacement for gtkwave, written in Rust with high-performance and larger-than-memory traces in mind.
  ☆19Updated 2 years ago
• FPGA-Research / FABulous
  Fabric generator and CAD tools
  ☆179Updated 3 weeks ago