google / skywater-pdk-libs-sky130_fd_pr_reramLinks
SKY130 ReRAM and examples (SkyWater Provided)
☆43Updated 3 years ago
Alternatives and similar repositories for skywater-pdk-libs-sky130_fd_pr_reram
Users that are interested in skywater-pdk-libs-sky130_fd_pr_reram are comparing it to the libraries listed below
Sorting:
- Index of the fully open source process design kits (PDKs) maintained by Google for GlobalFoundries technologies.☆51Updated 3 years ago
- 7 track standard cells for GF180MCU provided by GlobalFoundries.☆26Updated 3 years ago
- A RRAM addon for the NCSU FreePDK 45nm☆24Updated 4 years ago
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆81Updated 4 years ago
- Minimal SKY130 example with self-checking LVS, DRC, and PEX☆24Updated 4 years ago
- Automatic generation of real number models from analog circuits☆47Updated last year
- This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…☆46Updated 5 years ago
- Open Analog Design Environment☆25Updated 2 years ago
- EE 260 Winter 2017: Advanced VLSI Design☆68Updated 9 years ago
- An open source PDK using TIGFET 10nm devices.☆54Updated 3 years ago
- This is a tutorial on standard digital design flow☆82Updated 4 years ago
- Primitives for GF180MCU provided by GlobalFoundries.☆55Updated 2 years ago
- AMC: Asynchronous Memory Compiler☆51Updated 5 years ago
- Library of open source Process Design Kits (PDKs)☆64Updated this week
- Open source process design kit for 28nm open process☆72Updated last year
- Raw data collected about the SKY130 process technology.☆59Updated 2 years ago
- MRAM magnetization simulation framework. s-LLGS python and verilog-a solvers for transients simulation and Fokker-planck equation solver…☆46Updated 3 years ago
- ☆43Updated 3 years ago
- SRAM☆22Updated 5 years ago
- Primitives for SKY130 provided by SkyWater.☆32Updated last year
- ☆57Updated 2 years ago
- repository for a bandgap voltage reference in SKY130 technology☆41Updated 2 years ago
- VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.☆49Updated 4 years ago
- Verilog-A Preisach ferroelectric cap (PFECAP) simulation model for FET☆29Updated 5 years ago
- The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout…☆81Updated 3 years ago
- Design of 4KB(1024*32) SRAM with operating voltage 1.8v and access time < 2.5ns☆14Updated 5 years ago
- ☆86Updated 3 years ago
- FOSS-ASIC-TOOLS is all in one container for SKY130 based design both Analog and Digital. Below is a list of the current tools already ins…☆104Updated last year
- A free standard cell library for SDDS-NCL circuits☆28Updated 2 years ago
- This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK☆44Updated 3 years ago