vsdip / vsdStdCellCharacterizer_sky130Links
☆20Updated 4 years ago
Alternatives and similar repositories for vsdStdCellCharacterizer_sky130
Users that are interested in vsdStdCellCharacterizer_sky130 are comparing it to the libraries listed below
Sorting:
- ☆43Updated 3 years ago
- Minimal SKY130 example with self-checking LVS, DRC, and PEX☆24Updated 4 years ago
- Design of 1024*32 (4kB) SRAM with access time < 2.5ns using OpenRAM☆19Updated 5 years ago
- ☆44Updated 5 years ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆36Updated 3 years ago
- Intel's Analog Detailed Router☆39Updated 6 years ago
- submission repository for efabless mpw6 shuttle☆31Updated 2 years ago
- Open-source repository for a standard-cell library characterizer using complete open-source tools☆43Updated 3 weeks ago
- Source codes and calibration scripts for clock tree synthesis☆40Updated 5 years ago
- ☆13Updated 3 years ago
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆78Updated 5 years ago
- repository for a bandgap voltage reference in SKY130 technology☆41Updated 2 years ago
- CVC: Circuit Validity Checker. Check for errors in CDL netlist.☆32Updated 2 weeks ago
- ☆33Updated 5 years ago
- Characterizer☆30Updated last month
- SoCGen is a tool that automates SoC design by taking in a JSON description of the system and producing the final GDS-II. SoCGen supports …☆39Updated 5 years ago
- ☆33Updated last year
- An open source PDK using TIGFET 10nm devices.☆54Updated 3 years ago
- Python Tool for UVM Testbench Generation☆55Updated last year
- Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license☆50Updated 10 months ago
- This is the repository of IPs of the group in USC who is developing Analog Mixed-signal Parameter Search Engine (AMPSE). You can download…☆25Updated 2 years ago
- ☆19Updated last year
- This project shows the design of two 4-bit current steering DACs, based on Binary and Segmented architectures at VDD=1.8V supply, using h…☆20Updated 8 months ago
- Design of 4KB(1024*32) SRAM with operating voltage 1.8v and access time < 2.5ns☆14Updated 5 years ago
- Skywater 130nm Klayout Device Generators PDK☆30Updated last year
- This script builds openlane and all its dependencies on an Ubuntu (only) System.☆23Updated 3 years ago
- ☆14Updated 2 years ago
- This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk☆38Updated 4 years ago
- Open Source PHY v2☆32Updated last year
- Open Source tool to build liberty files and for Characterizing Standard Cells.☆28Updated 4 years ago