ieee-ceda-datc / datc-rdf-calibrationsLinks
☆18Updated 8 months ago
Alternatives and similar repositories for datc-rdf-calibrations
Users that are interested in datc-rdf-calibrations are comparing it to the libraries listed below
Sorting:
- CVC: Circuit Validity Checker. Check for errors in CDL netlist.☆23Updated 2 weeks ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆36Updated 2 years ago
- Design of 4KB(1024*32) SRAM with operating voltage 1.8v and access time < 2.5ns☆12Updated 4 years ago
- An open source PDK using TIGFET 10nm devices.☆49Updated 2 years ago
- An Open-Source Silicon Compiler for Reduced-Complexity Reconfigurable Fabrics☆11Updated last week
- Intel's Analog Detailed Router☆39Updated 5 years ago
- Designs for Process-Voltage-Temperature (PVT) Sensors with MCU☆22Updated 5 years ago
- ☆15Updated 5 years ago
- Cross EDA Abstraction and Automation☆39Updated this week
- gaw3-20200922 fork with patches to improve remote commands sent from xschem to display waveforms☆14Updated 3 months ago
- Source codes and calibration scripts for clock tree synthesis☆40Updated 5 years ago
- Design of 1024*32 (4kB) SRAM with access time < 2.5ns using OpenRAM☆19Updated 4 years ago
- Characterizer☆28Updated last month
- ☆17Updated 8 months ago
- An SRAM IP Uniquely designed with open source tools. Static RAM is a type of random-access memory that uses latching circuitry (flip-flop…☆11Updated 4 years ago
- ☆44Updated 5 years ago
- Analog and power building blocks for sky130 pdk☆20Updated 4 years ago
- Workshop on Open-Source EDA Technology (WOSET)☆49Updated 7 months ago
- Gate-level visualization generator for SKY130-based chip designs.☆19Updated 3 years ago
- ☆19Updated last year
- A configurable SRAM generator☆53Updated last week
- ☆14Updated last month
- Python library for working Standard Delay Format (SDF) Timing Annotation files.☆30Updated last year
- submission repository for efabless mpw6 shuttle☆30Updated last year
- A repository for Known Good Designs (KGDs). Does not contain any design files with NDA-sensitive information.☆36Updated 4 years ago
- ☆10Updated last year
- ☆32Updated 6 months ago
- KLayout technology files for ASAP7 FinFET educational process☆21Updated 2 years ago
- ☆37Updated 3 years ago
- Open-sourced utilities for initial flow setup, calibration, and other user functions for OpenROAD project☆19Updated 5 years ago