Alternatives and similar repositories for OpenRPDK28

Users that are interested in OpenRPDK28 are comparing it to the libraries listed below

• rahulk29 / sram22_sky130_macros
  SKY130 SRAM macros generated by SRAM 22
  ☆16Updated 3 weeks ago
• RIOSLaboratory / OpenXRAM
  sram/rram/mram.. compiler
  ☆33Updated last year
• rahulk29 / sram22
  A configurable SRAM generator
  ☆48Updated 4 months ago
• aolofsson / POSH
  ☆44Updated 5 years ago
• lnis-uofu / TIGFET-10nm-PDK
  An open source PDK using TIGFET 10nm devices.
  ☆48Updated 2 years ago
• bespoke-silicon-group / bsg_sv2v
  A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.
  ☆41Updated 2 years ago
• ShonTaware / SRAM_SKY130
  Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns
  ☆66Updated 4 years ago
• FPGA-Research / eFPGA---RTL-to-GDS-with-SKY130
  This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk
  ☆30Updated 3 years ago
• pulp-platform / svase
  ☆31Updated 4 months ago
• ReuelReuben / vsdSRAM
  SRAM
  ☆22Updated 4 years ago
• bespoke-silicon-group / bsg_fakeram
  fakeram generator for use by researchers who do not have access to commercial ram generators
  ☆37Updated 2 years ago
• yash-k99 / vsdsram
  Design of 1024*32 (4kB) SRAM with access time < 2.5ns using OpenRAM
  ☆19Updated 4 years ago
• stineje / sky130_cds
  This repository is an open-source version of SKY130 to help facilitate use of Cadence Design System tools for use with Skywater 130 Proce…
  ☆23Updated last year
• kunalg123 / icc2_workshop_collaterals
  This repository has a list of collaterals needed for ICC2 workshop. It has a modified version of raven_soc which was taped-out by Efables…
  ☆31Updated 4 years ago
• mattvenn / multi_project_tools
  tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles
  ☆35Updated 2 years ago
• sgherbst / sky130-hello-world
  Minimal SKY130 example with self-checking LVS, DRC, and PEX
  ☆23Updated 4 years ago
• ABKGroup / PROBE3.0
  ☆43Updated last year
• snishizawa / libretto
  Characterizer
  ☆22Updated 8 months ago
• vsdip / vsdsram_sky130
  ☆40Updated 3 years ago
• spider-tronix / Standard-Cell-Characterization
  Open Source tool to build liberty files and for Characterizing Standard Cells.
  ☆27Updated 4 years ago
• pulp-platform / axi_llc
  ☆27Updated last month
• AUCOHL / Lighter
  An automatic clock gating utility
  ☆47Updated 3 weeks ago
• efabless / sky130_sram_macros_old
  ☆36Updated 2 years ago
• aolofsson / IDEA
  ☆33Updated 5 years ago
• The-OpenROAD-Project / asap5
  ☆25Updated 2 years ago
• chipsalliance / aib-phy-generator
  AIB Generator: Analog hardware compiler for AIB PHY
  ☆33Updated 4 years ago
• asyncvlsi / AMC
  AMC: Asynchronous Memory Compiler
  ☆48Updated 4 years ago
• johnkustin / bandgapReferenceCircuit
  repository for a bandgap voltage reference in SKY130 technology
  ☆38Updated 2 years ago
• manili / VSDBabySoC
  VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.
  ☆42Updated 3 years ago
• bojackchen / digital-flow
  This is a tutorial on standard digital design flow
  ☆76Updated 3 years ago