sinkswim / vhdllib
My own VHDL components library. Anything from a flip flop to an ALU.
☆12Updated 9 months ago
Related projects ⓘ
Alternatives and complementary repositories for vhdllib
- Ethernet MAC 10/100 Mbps☆24Updated 3 years ago
- A small 32-bit implementation of the RISC-V architecture☆32Updated 4 years ago
- turbo 8051☆28Updated 7 years ago
- DSP with FPGAs 3. edition ISBN: 978-3-540-72612-8☆12Updated 2 years ago
- JTAG DPI module for SystemVerilog RTL simulations☆26Updated 9 years ago
- IEEE 754 single precision floating point library in systemverilog and vhdl☆26Updated 3 weeks ago
- A set of Wishbone Controlled SPI Flash Controllers☆76Updated 2 years ago
- USB Full Speed PHY☆39Updated 4 years ago
- Simple sram controller in verilog.☆30Updated 8 years ago
- Contains VHDL IP-blocks to create stand-alone RapidIO-endpoints, RapidIO-switches and RapidIO-switches with local endpoints.☆34Updated 7 years ago
- Sigma-Delta Analog to Digital Converter in FPGA (VHDL)☆16Updated 6 years ago
- USB 2.0 Device IP Core☆52Updated 7 years ago
- Wishbone interconnect utilities☆36Updated 5 months ago
- USB 1.1 Host and Function IP core☆19Updated 10 years ago
- Minimal microprocessor☆19Updated 7 years ago
- A simple 8 bit UART implementation in Verilog, with tests and timing diagrams☆19Updated last year
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆69Updated 7 months ago
- Multi-Technology RAM with AHB3Lite interface☆20Updated 6 months ago
- This is a circular buffer controller used in FPGA.☆33Updated 8 years ago
- Is a collection of NULL Convention Logic (NCL) circuits and libraries written in Verilog to provide the experience of logically determine…☆15Updated 8 years ago
- mirror of https://git.elphel.com/Elphel/eddr3☆40Updated 7 years ago
- FPGA implementation of the 8051 Microcontroller (Verilog)☆46Updated 10 years ago
- Extensible FPGA control platform☆54Updated last year
- Ethernet MAC 10/100 Mbps☆79Updated 5 years ago
- Digital Design Labs☆23Updated 5 years ago
- Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface☆20Updated 6 years ago
- SPI-Flash XIP Interface (Verilog)☆35Updated 3 years ago
- Small (Q)SPI flash memory programmer in Verilog☆55Updated 2 years ago
- Automated Git mirror of Gaisler's GRLIB/Leon3 releases☆15Updated 3 months ago
- few python scripts to clone all IP cores from opencores.org☆18Updated 10 months ago