lxp32 / lxp32-cpuLinks
A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set
☆65Updated 8 months ago
Alternatives and similar repositories for lxp32-cpu
Users that are interested in lxp32-cpu are comparing it to the libraries listed below
Sorting:
- SoftCPU/SoC engine-V☆55Updated 10 months ago
- 5-stage RISC-V CPU, originally developed for RISCBoy☆35Updated 2 years ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆63Updated 7 years ago
- Small Processing Unit 32: A compact RV32I CPU written in Verilog☆71Updated 3 years ago
- Portable HyperRAM controller☆62Updated last year
- Using VexRiscv without installing Scala☆39Updated 4 years ago
- A plain VHDL implementation of a small microprocessor fully compatible with the ISA of the well known PicoBlaze by Ken Chapman.☆22Updated 4 years ago
- Featherweight RISC-V implementation☆53Updated 4 years ago
- Gateware / Firmware / BuildRoot to run linux on iCE40 / iCEBreaker☆103Updated 2 years ago
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA☆82Updated 5 years ago
- LatticeMico32 soft processor☆107Updated 11 years ago
- The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog.☆72Updated 7 years ago
- Reusable Verilog 2005 components for FPGA designs☆49Updated last month
- Example Verilog code for Ulx3s☆41Updated 3 years ago
- FPGA optimized RISC-V (RV32IM) implemenation☆34Updated 5 years ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆93Updated 7 years ago
- iCE40HX8K development board with SRAM and bus for fast ADC, DAC, IOs☆39Updated last year
- DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.☆66Updated 2 years ago
- Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.☆62Updated 4 years ago
- Spen's Official OpenOCD Mirror☆51Updated 10 months ago
- A single-wire bi-directional chip-to-chip interface for FPGAs☆125Updated 9 years ago
- A FPGA core for a simple SDRAM controller.☆122Updated 4 years ago
- This repository contains small example designs that can be used with the open source icestorm flow.☆155Updated 4 years ago
- Small footprint and configurable Inter-Chip communication cores☆66Updated 2 weeks ago
- FPGA based microcomputer sandbox for software and RTL experimentation☆77Updated this week
- Wishbone interconnect utilities☆44Updated last month
- PicoRV☆43Updated 5 years ago
- A reimplementation of a tiny stack CPU☆86Updated 2 years ago
- Miscellaneous ULX3S examples (advanced)☆82Updated 7 months ago
- Tools for FPGA development.☆49Updated 5 months ago