racerxdl / pcieledblink

Related projects ⓘ

Alternatives and complementary repositories for pcieledblink

• j-marjanovic / jtag-quartus-ft232h
  ☆44Updated 2 years ago
• ultraembedded / core_usb_host
  Basic USB 1.1 Host Controller for small FPGAs
  ☆85Updated 4 years ago
• j-marjanovic / pp-sp-reference-design
  ☆39Updated 3 years ago
• wirebond / catapult_v2_pikes_peak
  Documenting Microsoft Catapult FPGA board (v2: Pikes Peak)
  ☆37Updated 4 years ago
• carlosedp / chisel-fpga-pinfinder
  A Chisel implementation for an FPGA Pin Finder thru UART
  ☆13Updated last month
• BrianHGinc / BrianHG-DDR3-Controller
  DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…
  ☆69Updated 7 months ago
• FelipeFFerreira / ITA-CORES
  RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32
  ☆40Updated last year
• aignacio / nox
  RISC-V Nox core
  ☆61Updated 3 months ago
• TinyTapeout / tinytapeout-ihp-0p1
  Experimental Tiny Tapeout chip on IHP SG13G2 0.13 μm BiCMOS process
  ☆14Updated 3 months ago
• thinkoco / microsoft_fpga
  Microsoft Catapult FPGA, Catapult V3, PCIE Test Demo, On-board usb Blaster and OpenCL BSP
  ☆45Updated 2 years ago
• chili-chips-ba / openCologne
  Spicing up the first and only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples. https://www.chil…
  ☆46Updated 2 weeks ago
• Parretto / DisplayPort
  DisplayPort IP-core
  ☆50Updated 3 weeks ago
• olofk / wb_intercon
  Wishbone interconnect utilities
  ☆37Updated 5 months ago
• ZiyangYE / General-Slow-DDR3-Interface
  A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.
  ☆36Updated 6 months ago
• FPGA-Research-Manchester / byteman
  Bitstream relocation and manipulation tool.
  ☆40Updated last year
• ultraembedded / core_dvi_framebuffer
  Minimal DVI / HDMI Framebuffer
  ☆76Updated 4 years ago
• ZipCPU / dbgbus
  A collection of debugging busses developed and presented at zipcpu.com
  ☆36Updated 10 months ago
• mattvenn / multi_project_tools
  tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles
  ☆35Updated last year
• ultraembedded / core_ftdi_bridge
  FTDI FT245 Style Synchronous/Asynchronous FIFO Bridge
  ☆27Updated 3 years ago
• BrunoLevy / TordBoyau
  A pipelined RISC-V processor
  ☆47Updated 11 months ago
• esynr3z / proto245
  🔴 SystemVerilog FPGA cores to communicate with FTDI Synchronous/Asynchronous FIFOs (FT245 protocol)
  ☆33Updated 3 years ago
• defparam / PCI2Nano-RTL
  An open source FPGA PCI core & 8250-Compatible PCI UART core
  ☆39Updated 3 years ago
• b224hisl / rioschip
  ☆33Updated last year
• dmitrodem / p1735_decryptor
  IEEE P1735 decryptor for VHDL
  ☆26Updated 9 years ago
• kazkojima / colorlight-i5-tips
  Tiny tips for Colorlight i5 FPGA board
  ☆55Updated 3 years ago
• ZipCPU / qspiflash
  A set of Wishbone Controlled SPI Flash Controllers
  ☆76Updated 2 years ago
• OVGN / OpenHBMC
  Open-source high performance AXI4-based HyperRAM memory controller
  ☆58Updated 2 years ago
• colognechip / gatemate_ila
  The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …
  ☆48Updated last week
• stnolting / neorv32-setups
  📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.
  ☆63Updated this week
• j-marjanovic / otma-pin-re
  ☆15Updated 3 years ago