racerxdl / pcieledblink
Stratix V PCIe Ledblink (for usage in Microsoft Storey Peak boards)
☆22Updated 3 years ago
Alternatives and similar repositories for pcieledblink
Users that are interested in pcieledblink are comparing it to the libraries listed below
Sorting:
- Documenting Microsoft Catapult FPGA board (v2: Pikes Peak)☆41Updated 5 years ago
- Collected resources and getting started with Azure PCIe FPGA device☆19Updated 2 months ago
- ☆18Updated 3 years ago
- ☆46Updated 3 years ago
- Microsoft Catapult FPGA, Catapult V3, PCIE Test Demo, On-board usb Blaster and OpenCL BSP☆55Updated 2 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆89Updated 4 years ago
- ☆45Updated 3 years ago
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA☆80Updated 4 years ago
- DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.☆55Updated last year
- Minimal DVI / HDMI Framebuffer☆81Updated 4 years ago
- Bitstream relocation and manipulation tool.☆44Updated 2 years ago
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆73Updated 10 months ago
- Vivado board files for the Kintex 7 HPC V2 FPGA board.☆26Updated 4 years ago
- An open source FPGA PCI core & 8250-Compatible PCI UART core☆41Updated 4 years ago
- A collection of debugging busses developed and presented at zipcpu.com☆41Updated last year
- A Chisel implementation for an FPGA Pin Finder thru UART☆17Updated 7 months ago
- A pipelined RISC-V processor☆55Updated last year
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆61Updated this week
- FPGA GPU design for DE1-SoC☆73Updated 3 years ago
- A demonstration showing how several components can be compsed to build a simulated spectrogram☆44Updated last year
- IEEE P1735 decryptor for VHDL☆32Updated 9 years ago
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆78Updated last year
- A truly opensource camera serial interface. No frills. No backdoors that compromise security. Outstanding signal integrity. Hi-rez video …☆47Updated this week
- Hardware-side component of Hastlayer for Microsoft Project Catapult FPGAs. See https://hastlayer.com for details.☆12Updated 5 years ago
- RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32☆46Updated last year
- ☆59Updated 3 years ago
- Wishbone interconnect utilities☆41Updated 3 months ago
- FPGA board-level debugging and reverse-engineering tool☆37Updated 2 years ago
- ☆22Updated 3 years ago
- Nitro USB FPGA core☆84Updated last year