fbrosser / DSP48E1-FPLinks
Project aimed at implementing floating point operators using the DSP48E1 slice.
☆29Updated 12 years ago
Alternatives and similar repositories for DSP48E1-FP
Users that are interested in DSP48E1-FP are comparing it to the libraries listed below
Sorting:
- Xilinx Unisim Library in Verilog☆85Updated 5 years ago
- This is mainly a simulation library of xilinx primitives that are verilator compatible.☆33Updated last year
- ☆38Updated 3 years ago
- A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.☆42Updated 2 years ago
- A Python package for generating HDL wrappers and top modules for HDL sources☆36Updated last week
- IEEE 754 single precision floating point library in systemverilog and vhdl☆32Updated 9 months ago
- For contributions of Chisel IP to the chisel community.☆66Updated 11 months ago
- Benchmarks for Yosys development☆24Updated 5 years ago
- USB virtual model in C++ for Verilog☆31Updated 11 months ago
- Multiply-Accumulate and Rectified-Linear Accelerator for Neural Networks☆91Updated 6 years ago
- ☆26Updated 5 years ago
- ☆33Updated 2 years ago
- Hamming ECC Encoder and Decoder to protect memories☆34Updated 8 months ago
- PDPU: An Open-Source Posit Dot-Product Unit for Deep Learning Applications☆43Updated 2 years ago
- Dual-issue RV64IM processor for fun & learning☆64Updated 2 years ago
- Experiments with fixed function renderers and Chisel HDL☆59Updated 6 years ago
- A configurable SRAM generator☆54Updated last month
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆36Updated 2 years ago
- An automatic clock gating utility☆50Updated 5 months ago
- ☆17Updated 5 years ago
- PicoRV☆44Updated 5 years ago
- Docker Development Environment for SpinalHDL☆20Updated last year
- Python library for working Standard Delay Format (SDF) Timing Annotation files.☆30Updated last year
- Latest in the line of the E32 processors with better/generic cache placement☆10Updated 2 years ago
- Gate-level visualization generator for SKY130-based chip designs.☆21Updated 4 years ago
- SRAM Design using OpenSource Applications☆23Updated 4 years ago
- Demo SoC for SiliconCompiler.☆61Updated last week
- RISC-V processor☆32Updated 3 years ago
- Bitstream relocation and manipulation tool.☆47Updated 2 years ago
- Advanced Debug Interface☆15Updated 8 months ago