Basic floating-point components for RISC-V processors
☆69Dec 4, 2019Updated 6 years ago
Alternatives and similar repositories for CNRV-FPU
Users that are interested in CNRV-FPU are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Basic floating-point components for RISC-V processors☆12Aug 13, 2017Updated 8 years ago
- double_fpu_verilog☆21Jul 17, 2014Updated 12 years ago
- FPU Generator☆20Jul 16, 2026Updated last week
- For CPU experiment☆14Feb 23, 2021Updated 5 years ago
- ☆62Feb 18, 2019Updated 7 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆14Jul 16, 2026Updated last week
- verification of simple axi-based cache☆19May 14, 2019Updated 7 years ago
- Approximate arithmetic circuits for FPGAs☆13Feb 19, 2020Updated 6 years ago
- IEEE 754 single and double precision floating point library in systemverilog and vhdl☆82Jul 18, 2026Updated last week
- ☆386Jun 14, 2026Updated last month
- [UNRELEASED] FP div/sqrt unit for transprecision☆27Jul 16, 2026Updated last week
- 《关于浮点运算：作为程序员都应该了解什么？》☆28Apr 17, 2018Updated 8 years ago
- Provides dot visualizations of chisel/firrtl circuites☆13Mar 12, 2019Updated 7 years ago
- Chisel Things for OFDM☆33Jul 1, 2020Updated 6 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- Functional Verification the MMU (Memory Management Unit) of a multiprocessor with Data Cache and Instruction Cache☆14Nov 9, 2015Updated 10 years ago
- A Rocket-based RISC-V superscalar in-order core☆42Jul 12, 2026Updated 2 weeks ago
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆624Updated this week
- synthesiseable ieee 754 floating point library in verilog☆748Mar 13, 2023Updated 3 years ago
- IEEE 754 floating point unit in Verilog☆152May 20, 2016Updated 10 years ago
- Drive a Wishbone master bus with an SPI bus.☆10Apr 24, 2025Updated last year
- 6-stage dual-issue in-order superscalar risc-v cpu☆14Updated this week
- CPUs☆17Dec 21, 2020Updated 5 years ago
- C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)☆53Jul 14, 2020Updated 6 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- RIDECORE (RIsc-v Dynamic Execution CORE) is an Out-of-Order RISC-V processor written in Verilog HDL.☆379Jul 12, 2017Updated 9 years ago
- Chisel implementation of the NVIDIA Deep Learning Accelerator (NVDLA), with self-driving accelerated☆237Dec 22, 2025Updated 7 months ago
- An Open Source Link Protocol and Controller☆29Jul 26, 2021Updated 5 years ago
- ASIC Design of the openSPARC Floating Point Unit☆17Mar 13, 2017Updated 9 years ago
- RISC-V GPGPU☆39Mar 6, 2020Updated 6 years ago
- my rc files☆12Mar 16, 2016Updated 10 years ago
- Raptor is an SoC Design Template based on Arm Cortex M0 or M3 core.☆22Oct 9, 2019Updated 6 years ago
- A fault-injection framework using Chisel and FIRRTL☆39Sep 17, 2025Updated 10 months ago
- RTL blocks compatible with the Rocket Chip Generator☆17Mar 30, 2025Updated last year
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Wake build descriptions of hardware generators☆12Dec 11, 2020Updated 5 years ago
- A Verilog AMBA AHB Multilayer interconnect generator☆13Aug 8, 2017Updated 8 years ago
- ☆85Jun 1, 2022Updated 4 years ago
- tools regarding on analog modeling, validation, and generation☆25Apr 11, 2023Updated 3 years ago
- Comment on the rocket-chip source code☆179Oct 19, 2018Updated 7 years ago
- A RISC-V processor written in BSV, based on the Flute core. Has support for integrating tightly-coupled accelerators, and for integrating…☆24Oct 1, 2022Updated 3 years ago
- A RISC-V Symmetric Multiprocessor(SMP) based on TileLink and can run Linux OS☆38Oct 23, 2025Updated 9 months ago