jetafese / btor2mlirLinks
Bᴛᴏʀ2MLIR: A Format and Toolchain for Hardware Verification
☆15Updated 9 months ago
Alternatives and similar repositories for btor2mlir
Users that are interested in btor2mlir are comparing it to the libraries listed below
Sorting:
- BTOR2 MLIR project☆26Updated last year
- FPGA synthesis tool powered by program synthesis☆51Updated last month
- ☆19Updated last year
- Random Generator of Btor2 Files☆10Updated last year
- rIC3 model checker for Hardware Model Checking Competition 2024(HWMCC'24) submission☆12Updated last month
- ☆15Updated 2 years ago
- ☆14Updated 7 years ago
- The HW-CBMC and EBMC Model Checkers for Verilog☆81Updated this week
- compiling DSLs to high-level hardware instructions☆23Updated 2 years ago
- A generic parser and tool package for the BTOR2 format.☆41Updated 3 months ago
- A Coq framework to support structural design and proof of hardware cache-coherence protocols☆14Updated 3 years ago
- RTLCheck☆22Updated 6 years ago
- A enumerator for MLIR, relying on the information given by IRDL.☆19Updated last week
- Automatically generate a compiler using equality saturation☆30Updated last year
- ☆16Updated 3 years ago
- SMTSampler: Efficient Stimulus Generation from Complex SMT Constraints☆29Updated 5 years ago
- CoreIR Symbolic Analyzer☆73Updated 4 years ago
- A Hardware Pipeline Description Language☆45Updated last month
- E-morphic: Scalable Equality Saturation for Structural Exploration in Logic Synthesis (DAC2025)☆20Updated 2 months ago
- A translation validation framework for MLIR☆88Updated 5 months ago
- ☆11Updated last month
- A Parallel SAT Solver with GPU Accelerated Inprocessing☆123Updated last month
- Using e-graphs to synthesize netlists from boolean logic.☆14Updated 2 years ago
- Minimal RISC-V Chisel design strictly reflecting the ISA document for verification.☆14Updated 2 months ago
- ☆13Updated last year
- AMulet 2. - A better AIG Multiplier Examination Tool☆25Updated 2 years ago
- SMT-LIB benchmarks for shape computations from deep learning models in PyTorch☆17Updated 2 years ago
- Integer Multiplier Generator for Verilog☆23Updated last month
- ☆13Updated 4 years ago
- ☆18Updated last year