tancheng / CGRA-BenchLinks
☆15Updated last month
Alternatives and similar repositories for CGRA-Bench
Users that are interested in CGRA-Bench are comparing it to the libraries listed below
Sorting:
- An integrated CGRA design framework☆91Updated 8 months ago
- CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.☆148Updated last week
- An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.☆80Updated 2 weeks ago
- An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.☆64Updated last year
- Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)☆62Updated 3 years ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆65Updated 4 years ago
- ☆32Updated last year
- Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators☆30Updated 2 years ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆47Updated 3 years ago
- An Open-Source Tool for CGRA Accelerators☆76Updated 3 months ago
- [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.☆127Updated 2 years ago
- The open-sourced version of BOOM-Explorer☆45Updated 2 years ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆83Updated 4 years ago
- ☆72Updated 2 years ago
- Benchmarks for Accelerator Design and Customized Architectures☆135Updated 5 years ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆95Updated last year
- The RAD flow is an open-source academic architecture exploration and evaluation flow for novel beyond-FPGA reconfigurable acceleration de…☆38Updated 4 months ago
- CGRA Compilation Framework☆88Updated 2 years ago
- OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.☆163Updated 2 years ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆82Updated 6 years ago
- PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …☆71Updated 2 years ago
- gem5 repository to study chiplet-based systems☆84Updated 6 years ago
- CGRA framework with vectorization support.☆41Updated this week
- Dataset for ML-guided Accelerator Design☆42Updated last year
- TAPA compiles task-parallel HLS program into high-performance FPGA accelerators. UCLA-maintained.☆176Updated 3 months ago
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆54Updated 5 years ago
- ☆28Updated 6 years ago
- ☆107Updated last year
- This tools offer many simulation of memory design detail parameter. Then you can setting these parameter to running result in your condit…☆18Updated 9 years ago
- ☆87Updated last year