Alternatives and similar repositories for arena:

Users that are interested in arena are comparing it to the libraries listed below

• tancheng / VectorCGRA
  CGRA framework with vectorization support.
  ☆27Updated this week
• tancheng / mlir-cgra
  An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.
  ☆58Updated 5 months ago
• tancheng / CGRA-Bench
  ☆14Updated 2 years ago
• MPSLab-ASU / DiRAC
  Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators
  ☆28Updated last year
• cornell-zhang / GraphLily
  A graph linear algebra overlay
  ☆52Updated last year
• ecolab-nus / morpher-v2
  An Open-Source Tool for CGRA Accelerators
  ☆19Updated 11 months ago
• MPSLab-ASU / ccf
  CGRA Compilation Framework
  ☆83Updated last year
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆45Updated 2 years ago
• ecolab-nus / morpher
  An Open-Source Tool for CGRA Accelerators
  ☆59Updated 2 months ago
• cucapra / EventQueue
  EQueue Dialect
  ☆40Updated 3 years ago
• tancheng / CGRA-Mapper
  An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.
  ☆64Updated last week
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆48Updated last month
• Licheng-Guo / vivado-hls-broadcast-optimization
  [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency
  ☆32Updated 4 years ago
• PrincetonUniversity / MosaicSim
  Heterogeneous simulator for DECADES Project
  ☆32Updated 10 months ago
• yhqiu16 / TRAM
  Template-based Reconfigurable Architecture Modeling Framework
  ☆14Updated 2 years ago
• tancheng / CGRA-Flow
  CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.
  ☆121Updated 2 weeks ago
• ecolab-nus / Morpher_CGRA_Mapper
  ☆16Updated 2 months ago
• lana555 / dynamatic
  ☆86Updated last year
• pku-dasys / easymac
  ☆16Updated 3 years ago
• cornell-zhang / uptune
  A Generic Distributed Auto-Tuning Infrastructure
  ☆22Updated 3 years ago
• PrincetonUniversity / muchiSim
  Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…
  ☆62Updated 8 months ago
• sld-columbia / hl5
  A 32-bit RISC-V Processor Designed with High-Level Synthesis
  ☆52Updated 5 years ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆77Updated 7 months ago
• icgrp / hipr
  ☆15Updated 2 years ago
• spcl / rapidchiplet
  A toolchain for rapid design space exploration of chiplet architectures
  ☆44Updated last week
• pku-liang / Hector
  A hardware synthesis framework with multi-level paradigm
  ☆38Updated 2 months ago
• breagen / MachSuite
  Benchmarks for Accelerator Design and Customized Architectures
  ☆120Updated 4 years ago
• UT-LCA / ML4Accel-Dataset
  Dataset for ML-guided Accelerator Design
  ☆36Updated 4 months ago
• cornell-brg / pymtl3-net
  Project repo for the POSH on-chip network generator
  ☆44Updated last week
• PolyArch / dsagen2
  Domain-Specific Architecture Generator 2
  ☆21Updated 2 years ago