Alternatives and similar repositories for arena

Users that are interested in arena are comparing it to the libraries listed below

• cornell-zhang / GraphLily
  A graph linear algebra overlay
  ☆51Updated 2 years ago
• MPSLab-ASU / ccf
  CGRA Compilation Framework
  ☆91Updated 2 years ago
• tancheng / mlir-cgra
  An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.
  ☆64Updated last year
• MPSLab-ASU / DiRAC
  Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators
  ☆30Updated 2 years ago
• tancheng / VectorCGRA
  CGRA framework with vectorization support.
  ☆42Updated last week
• Xilinx / merlin-compiler
  ☆60Updated 2 years ago
• Blaok / fpga-runtime
  ☆13Updated last year
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆62Updated 9 months ago
• cornell-zhang / uptune
  A Generic Distributed Auto-Tuning Infrastructure
  ☆24Updated 4 years ago
• UCLA-VAST / HARP
  ICCAD'23 Best Paper Award candidate: Robust GNN-based Representation Learning for HLS
  ☆23Updated last year
• breagen / MachSuite
  Benchmarks for Accelerator Design and Customized Architectures
  ☆136Updated 5 years ago
• pku-dasys / easymac
  ☆18Updated 3 years ago
• NeuraChip / neurachip
  NeuraChip Accelerator Simulator
  ☆15Updated last year
• ecolab-nus / lisa
  A portable framework to map DFG (dataflow graph, representing an application) on spatial accelerators.
  ☆40Updated 3 years ago
• sharc-lab / LightningSim
  A fast, accurate trace-based simulator for High-Level Synthesis.
  ☆74Updated last month
• zhguanw / lin-analyzer
  A high-level performance analysis tool for FPGA-based accelerators
  ☆19Updated 8 years ago
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆47Updated 3 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆95Updated last year
• UCLA-VAST / GNN-DSE
  DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"
  ☆40Updated 2 years ago
• Accelergy-Project / processing-in-memory-design
  ☆25Updated last year
• pku-dasys / pillars
  An integrated CGRA design framework
  ☆91Updated 10 months ago
• arc-research-lab / AIM
  AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper a…
  ☆24Updated 8 months ago
• UCLA-VAST / AutoDSE
  ACM TODAES Best Paper Award, 2022
  ☆32Updated 2 years ago
• tancheng / CGRA-Flow
  CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.
  ☆152Updated this week
• hpc-ulisboa / NDPmulator
  A Full-System Framework for Simulating NDP devices from Caches to DRAM
  ☆21Updated 2 years ago
• cucapra / EventQueue
  EQueue Dialect
  ☆41Updated 3 years ago
• PrincetonUniversity / MosaicSim
  Heterogeneous simulator for DECADES Project
  ☆32Updated last year
• synergy-noc-generators / Proteus
  ☆10Updated 2 years ago
• ecolab-nus / Morpher_CGRA_Mapper
  ☆18Updated 8 months ago
• GT-CHIPS / gem5_chips
  gem5 repository to study chiplet-based systems
  ☆85Updated 6 years ago