Alternatives and similar repositories for DRAMsim3:

Users that are interested in DRAMsim3 are comparing it to the libraries listed below

• CMU-SAFARI / ramulator2
  Ramulator 2.0 is a modern, modular, extensible, and fast cycle-accurate DRAM simulator. It provides support for agile implementation and …
  ☆306Updated 3 months ago
• umd-memsys / DRAMSim2
  DRAMSim2: A cycle accurate DRAM simulator
  ☆265Updated 4 years ago
• CMU-SAFARI / ramulator
  A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, …
  ☆622Updated last year
• HewlettPackard / cacti
  An integrated cache and memory access time, cycle time, area, leakage, and dynamic power model
  ☆439Updated 9 months ago
• harvard-acc / gem5-aladdin
  End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.
  ☆230Updated 2 years ago
• tukl-msd / DRAMSys
  DRAMSys a SystemC TLM-2.0 based DRAM simulator.
  ☆250Updated last week
• HewlettPackard / mcpat
  An integrated power, area, and timing modeling framework for multicore and manycore architectures
  ☆180Updated 4 years ago
• booksim / booksim2
  BookSim 2.0
  ☆313Updated 9 months ago
• NVlabs / matchlib
  SystemC/C++ library of commonly-used hardware functions and components for HLS.
  ☆265Updated 4 months ago
• tukl-msd / DRAMPower
  Fast and accurate DRAM power and energy estimation tool
  ☆151Updated last week
• CMU-SAFARI / ramulator-pim
  A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combi…
  ☆156Updated 2 years ago
• pulp-platform / ara
  The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 …
  ☆412Updated this week
• RV-BOSC / OpenNoC
  ☆131Updated last month
• sparcians / map
  Modeling Architectural Platform
  ☆180Updated last week
• cnrv / rocket-chip-read
  Comment on the rocket-chip source code
  ☆174Updated 6 years ago
• vineodd / PIMSim
  PIMSim is a Process-In-Memory Simulator with the compatibility of GEM5 full-system simulation.
  ☆195Updated last year
• davidepatti / noxim
  Network on Chip Simulator
  ☆260Updated last year
• OpenXiangShan / GEM5
  ☆74Updated this week
• ucb-bar / constellation
  A Chisel RTL generator for network-on-chip interconnects
  ☆189Updated 2 weeks ago
• schoeberl / chisel-lab
  Lab exercises for Chisel in the digital electronics 2 course at DTU
  ☆191Updated last week
• cnrv / fpga-rocket-chip
  Wrapper for Rocket-Chip on FPGAs
  ☆129Updated 2 years ago
• ucb-bar / berkeley-hardfloat
  ☆310Updated 6 months ago
• UCLA-VAST / AutoSA
  AutoSA: Polyhedral-Based Systolic Array Compiler
  ☆215Updated 2 years ago
• pnnl / OpenCGRA
  OpenCGRA is an open-source framework for modeling, testing, and evaluating CGRAs.
  ☆145Updated 2 years ago
• scalesim-project / scale-sim-v2
  Repository to host and maintain scale-sim-v2 code
  ☆276Updated last week
• openhwgroup / force-riscv
  Instruction Set Generator initially contributed by Futurewei
  ☆274Updated last year
• bespoke-silicon-group / bsg_manycore
  Tile based architecture designed for computing efficiency, scalability and generality
  ☆249Updated 3 weeks ago
• UIUC-ChenLab / scalehls
  A scalable High-Level Synthesis framework on MLIR
  ☆252Updated 10 months ago
• schoeberl / chisel-examples
  Chisel examples and code snippets
  ☆246Updated 2 years ago
• harvard-acc / ALADDIN
  A pre-RTL, power-performance model for fixed-function accelerators
  ☆174Updated last year