Alternatives and similar repositories for uSystolic-Sim

Users that are interested in uSystolic-Sim are comparing it to the libraries listed below

• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆54Updated this week
• gem5-X / TiC-SAT
  ☆17Updated last month
• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆45Updated 3 years ago
• iitm-sysdl / FuSeConv
  Code for paper "FuSeConv Fully Separable Convolutions for Fast Inference on Systolic Arrays" published at DATE 2021
  ☆14Updated 3 years ago
• maeri-project / FEATHER
  A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
  ☆54Updated 3 months ago
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆44Updated 2 years ago
• maestro-project / gamma
  ☆41Updated 11 months ago
• UCLA-VAST / FlexCNN
  ☆71Updated 2 years ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆79Updated 10 months ago
• alexmr09 / Mixed-precision-Neural-Networks-on-RISC-V-Cores
  ☆29Updated 3 weeks ago
• jha-lab / acceltran
  [TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers
  ☆46Updated last year
• rgb000000 / eyeriss-chisel3
  eyeriss-chisel3
  ☆40Updated 3 years ago
• Zhu-Zixuan / Bitlet-PE
  A bit-level sparsity-awared multiply-accumulate process element.
  ☆16Updated 11 months ago
• Yinxiao-Feng / chiplet-network-sim
  ☆33Updated 3 weeks ago
• hngenc / stellar
  ☆30Updated 7 months ago
• KULeuven-MICAS / DeFiNES
  A framework for fast exploration of the depth-first scheduling space for DNN accelerators
  ☆39Updated 2 years ago
• georgia-tech-synergy-lab / SIGMA
  RTL implementation of Flex-DPE.
  ☆103Updated 5 years ago
• pku-liang / Sanger
  A co-design architecture on sparse attention
  ☆52Updated 3 years ago
• UCLA-VAST / hbmbench
  ☆24Updated 4 years ago
• kelvin0207 / SparSynergy
  Open source RTL implementation of Tensor Core, Sparse Tensor Core, BitWave and SparSynergy in the article: "SparSynergy: Unlocking Flexib…
  ☆18Updated 2 months ago
• isakedo / DNNsim
  ☆35Updated 4 years ago
• lsq314 / SpMM_TCAD
  ☆17Updated 9 months ago
• pku-liang / TensorLib
  A Spatial Accelerator Generation Framework for Tensor Algebra.
  ☆57Updated 3 years ago
• yhqiu16 / TRAM
  Template-based Reconfigurable Architecture Modeling Framework
  ☆14Updated 2 years ago
• synergy-noc-generators / Proteus
  ☆10Updated 2 years ago
• UCLA-VAST / AutoDSE
  ACM TODAES Best Paper Award, 2022
  ☆25Updated last year
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆55Updated 3 months ago
• actlab-genesys / GeneSys
  An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.
  ☆57Updated 3 months ago
• sfu-arch / SpGEMM
  ☆35Updated 4 years ago
• jha-lab / codebench
  [TECS'23] A project on the co-design of Accelerators and CNNs.
  ☆20Updated 2 years ago