Alternatives and similar repositories for uSystolic-Sim:

Users that are interested in uSystolic-Sim are comparing it to the libraries listed below

• MPSLab-ASU / dMazeRunner
  dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators
  ☆45Updated 2 years ago
• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆48Updated this week
• iitm-sysdl / FuSeConv
  Code for paper "FuSeConv Fully Separable Convolutions for Fast Inference on Systolic Arrays" published at DATE 2021
  ☆14Updated 3 years ago
• maeri-project / FEATHER
  A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
  ☆46Updated 4 months ago
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆41Updated 2 years ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆77Updated 6 months ago
• casys-kaist / mNPUsim
  mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)
  ☆45Updated 2 months ago
• maestro-project / gamma
  ☆39Updated 7 months ago
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆42Updated this week
• hngenc / stellar
  ☆22Updated 3 months ago
• sfu-arch / SpGEMM
  ☆34Updated 3 years ago
• Accelergy-Project / processing-in-memory-design
  ☆25Updated 10 months ago
• kartik-hegde / mindmappings
  A reference implementation of the Mind Mappings Framework.
  ☆29Updated 3 years ago
• maestro-project / magma
  ☆16Updated 2 years ago
• neurosim / 3D_NeuroSim_V1.0
  Benchmark framework of 3D integrated CIM accelerators for popular DNN inference, support both monolithic and heterogeneous 3D integration
  ☆22Updated 3 years ago
• KULeuven-MICAS / zigzag-imc
  HW accelerator mapping optimization framework for in-memory computing
  ☆21Updated last month
• UCLA-VAST / FlexCNN
  ☆71Updated 2 years ago
• synergy-noc-generators / Proteus
  ☆9Updated 2 years ago
• ucb-bar / cosa
  A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)
  ☆79Updated last year
• Accelergy-Project / accelergy-timeloop-infrastructure
  Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop
  ☆48Updated 3 weeks ago
• FCAS-LAB / chiplet_simulators
  A list of our chiplet simulaters
  ☆28Updated 3 years ago
• alexmr09 / Mixed-precision-Neural-Networks-on-RISC-V-Cores
  ☆21Updated 6 months ago
• MPSLab-ASU / DiRAC
  Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators
  ☆28Updated last year
• actlab-genesys / GeneSys
  An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.
  ☆44Updated last month
• pku-liang / TensorLib
  A Spatial Accelerator Generation Framework for Tensor Algebra.
  ☆55Updated 3 years ago
• ecolab-nus / morpher
  An Open-Source Tool for CGRA Accelerators
  ☆58Updated last month
• diwu1990 / UnarySim
  This is a general-purpose simulator for unary computing based on PyTorch, with the paper accepted to ISCA 2020 and awarded IEEE Micro Top…
  ☆42Updated last year
• yhqiu16 / TRAM
  Template-based Reconfigurable Architecture Modeling Framework
  ☆14Updated 2 years ago
• Yinxiao-Feng / chiplet-network-sim
  ☆23Updated 2 months ago
• tancheng / CGRA-Mapper
  An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.
  ☆59Updated 2 months ago