A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
☆85Nov 7, 2021Updated 4 years ago
Alternatives and similar repositories for uSystolic-Sim
Users that are interested in uSystolic-Sim are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- This is a general-purpose simulator for unary computing based on PyTorch, with the paper accepted to ISCA 2020 and awarded IEEE Micro Top…☆47Jul 31, 2025Updated last year
- Repository for compilation and cycle-accurate simulator for scale-out systolic arrays☆16Jan 4, 2023Updated 3 years ago
- Repository to host and maintain SCALE-Sim code☆540Jun 28, 2026Updated 4 months ago
- ☆386May 11, 2023Updated 3 years ago
- Stochastic Computing for Deep Neural Networks☆34Nov 25, 2020Updated 5 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- MICRO22 artifact evaluation for Sparseloop☆47Aug 8, 2022Updated 4 years ago
- [HPCA 2023] ViTCoD: Vision Transformer Acceleration via Dedicated Algorithm and Accelerator Co-Design☆136Jun 27, 2023Updated 3 years ago
- ☆29Nov 5, 2021Updated 4 years ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆68Sep 24, 2021Updated 5 years ago
- A general framework for optimizing DNN dataflow on systolic array☆40Jan 2, 2021Updated 5 years ago
- STONNE: A Simulation Tool for Neural Networks Engines☆156Jun 16, 2025Updated last year
- HLS project modeling various sparse accelerators.☆12Jan 11, 2022Updated 4 years ago
- [ICASSP'20] DNN-Chip Predictor: An Analytical Performance Predictor for DNN Accelerators with Various Dataflows and Hardware Architecture…☆24Oct 1, 2022Updated 4 years ago
- Simulator for BitFusion☆104Aug 6, 2020Updated 6 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Release of stream-specialization software/hardware stack.☆127May 5, 2023Updated 3 years ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆48Apr 4, 2022Updated 4 years ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆96Aug 11, 2026Updated 2 months ago
- An analytical cost model evaluating DNN mappings (dataflows and tiling).☆264Apr 15, 2024Updated 2 years ago
- ☆10Jun 28, 2019Updated 7 years ago
- ☆48Aug 23, 2021Updated 5 years ago
- HW/SW co-design of sentence-level energy optimizations for latency-aware multi-task NLP inference☆56Mar 24, 2024Updated 2 years ago
- Accelergy is an energy estimation infrastructure for accelerator energy estimations☆179May 26, 2025Updated last year
- ☆12Nov 24, 2023Updated 2 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- ☆45Jun 30, 2024Updated 2 years ago
- [TECS'23] A project on the co-design of Accelerators and CNNs.☆21Dec 10, 2022Updated 3 years ago
- Next generation CGRA generator☆119Updated this week
- Fast and accurate DRAM power and energy estimation tool☆221Sep 7, 2026Updated last month
- Adaptive floating-point based numerical format for resilient deep learning☆14Apr 11, 2022Updated 4 years ago
- [HPCA 2022] GCoD: Graph Convolutional Network Acceleration via Dedicated Algorithm and Accelerator Co-Design☆39Mar 30, 2022Updated 4 years ago
- RTL implementation of Flex-DPE.☆119Feb 22, 2020Updated 6 years ago
- NPUsim: Full-Model, Cycle-Level, and Value-Aware Simulator for DNN Accelerators☆57Oct 20, 2026Updated 2 weeks ago
- ☆15Jul 25, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆676Jan 13, 2021Updated 5 years ago
- ☆125Nov 17, 2023Updated 2 years ago
- AutoSA: Polyhedral-Based Systolic Array Compiler☆249Dec 8, 2022Updated 3 years ago
- A portable framework to map DFG (dataflow graph, representing an application) on spatial accelerators.☆41Oct 31, 2022Updated 4 years ago
- ☆73Feb 16, 2023Updated 3 years ago
- SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin☆115Jan 4, 2023Updated 3 years ago
- ☆74Mar 22, 2020Updated 6 years ago