Repository for compilation and cycle-accurate simulator for scale-out systolic arrays
☆16Jan 4, 2023Updated 3 years ago
Alternatives and similar repositories for sosa-compiler
Users that are interested in sosa-compiler are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆84Nov 7, 2021Updated 4 years ago
- An analytical cost model evaluating DNN mappings (dataflows and tiling).☆259Apr 15, 2024Updated 2 years ago
- Repository to host and maintain SCALE-Sim code☆502Jun 28, 2026Updated last month
- A hardware accelerator for General Matrix Multiply, developed in SystemC using ESP.☆20May 26, 2021Updated 5 years ago
- ☆19Jul 9, 2026Updated 2 weeks ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin☆116Jan 4, 2023Updated 3 years ago
- A parametric RTL code generator of an efficient integer MxM Systolic Array implementation for Xilinx FPGAs, with error detection capabili…☆14Aug 28, 2025Updated 11 months ago
- RISC-V Superscalar Educational Simulator based on Tomasulo's Algorithm☆36Nov 1, 2025Updated 8 months ago
- ☆15May 8, 2025Updated last year
- Serpens is an HBM FPGA accelerator for SpMV☆23Jul 26, 2024Updated 2 years ago
- Revisit Kernel Pruning with Lottery Regulated Grouped Convolutions. ICLR 2022☆11Nov 24, 2022Updated 3 years ago
- The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.☆83Mar 12, 2025Updated last year
- Heterogeneous Cluster Interconnect to bind special-purpose HW accelerators with general-purpose cluster cores☆17Updated this week
- STONNE: A Simulation Tool for Neural Networks Engines☆153Jun 16, 2025Updated last year
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆76Jun 30, 2024Updated 2 years ago
- A flexible event-driven cycle-accurate network simulator☆28Jan 28, 2020Updated 6 years ago
- ☆16Jun 17, 2025Updated last year
- MICRO 2024 Evaluation Artifact for FuseMax☆17Aug 26, 2024Updated last year
- ☆12Nov 24, 2023Updated 2 years ago
- Quick & Flexible Rack-Scale Computer Architecture Simulator☆54Jul 14, 2026Updated 2 weeks ago
- ☆17Jul 10, 2026Updated 2 weeks ago
- Memory Compiler Tutorial☆14Aug 2, 2022Updated 3 years ago
- gem5 repository to study chiplet-based systems☆91Apr 18, 2019Updated 7 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- A parser for PTX 6.5☆13Jun 19, 2023Updated 3 years ago
- Highly accurate counter for measuring elapsed time in Python☆15Oct 28, 2019Updated 6 years ago
- ☆18Feb 13, 2021Updated 5 years ago
- vector accelerating unit☆37Dec 1, 2020Updated 5 years ago
- Final Project for Digital Systems Design Course, Fall 2020☆17Jul 20, 2022Updated 4 years ago
- The open- MSP430 is an open-source 16-bit microcontroller core written in Verilog, that is compatible with the Texas Instruments MSP430 m…☆18Jan 28, 2022Updated 4 years ago
- Lower chisel memories to SRAM macros☆13Mar 25, 2024Updated 2 years ago
- ☆83Jun 23, 2025Updated last year
- Archive of MetaStuff lib☆12Nov 30, 2022Updated 3 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- MICRO 2023 Evaluation Artifact for TeAAL☆11Oct 26, 2023Updated 2 years ago
- Open source RTL implementation of Tensor Core, Sparse Tensor Core, BitWave and SparSynergy in the article: "SparSynergy: Unlocking Flexib…☆26Mar 29, 2025Updated last year
- This project is focused on the design and verification of digital logic circuits, particularly targeting chip design using Verilog, Syst…☆15Jun 26, 2024Updated 2 years ago
- ☆14Oct 8, 2024Updated last year
- NoC simulation using gem5 (a simple tul)☆16Mar 23, 2024Updated 2 years ago
- Pelican theme based on Bootstrap☆11Jun 17, 2023Updated 3 years ago
- This is a Clang tool that parses SystemC models, and synthesizes Verilog from it.☆90Apr 13, 2026Updated 3 months ago