BRTResearch / AIChip_Paper_ListLinks
☆639Updated 4 years ago
Alternatives and similar repositories for AIChip_Paper_List
Users that are interested in AIChip_Paper_List are comparing it to the libraries listed below
Sorting:
- Timeloop performs modeling, mapping and code-generation for tensor algebra workloads on various accelerator architectures.☆415Updated last month
- ☆363Updated 2 years ago
- Repository to host and maintain SCALE-Sim code☆333Updated 3 weeks ago
- CSV spreadsheets and other material for AI accelerator survey papers☆177Updated last year
- An analytical cost model evaluating DNN mappings (dataflows and tiling).☆225Updated last year
- This is the top-level repository for the Accel-Sim framework.☆465Updated 3 weeks ago
- Berkeley's Spatial Array Generator☆1,037Updated this week
- Open, Modular, Deep Learning Accelerator☆303Updated last year
- HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing☆340Updated last year
- NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and…☆230Updated 6 years ago
- Explore the energy-efficient dataflow scheduling for neural networks.☆226Updated 5 years ago
- An integrated cache and memory access time, cycle time, area, leakage, and dynamic power model☆483Updated last year
- Accelergy is an energy estimation infrastructure for accelerator energy estimations☆147Updated 3 months ago
- AutoSA: Polyhedral-Based Systolic Array Compiler☆223Updated 2 years ago
- A scalable High-Level Synthesis framework on MLIR☆273Updated last year
- GPGPU processor supporting RISCV-V extension, developed with Chisel HDL☆791Updated this week
- End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.☆244Updated 2 years ago
- Automatic Schedule Exploration and Optimization Framework for Tensor Computations☆180Updated 3 years ago
- ☆145Updated last year
- Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.☆220Updated 6 years ago
- PIMSim is a Process-In-Memory Simulator with the compatibility of GEM5 full-system simulation.☆205Updated 2 years ago
- Allo: A Programming Model for Composable Accelerator Design☆272Updated this week
- Ramulator 2.0 is a modern, modular, extensible, and fast cycle-accurate DRAM simulator. It provides support for agile implementation and …☆375Updated last month
- BookSim 2.0☆358Updated last year
- Course Webpage for CS 217 Hardware Accelerators for Machine Learning, Stanford University☆98Updated 2 years ago
- An MLIR-based toolchain for AMD AI Engine-enabled devices.☆467Updated this week
- ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference☆146Updated 6 months ago
- A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, …☆651Updated 2 years ago
- Research and Materials on Hardware implementation of Transformer Model☆279Updated 6 months ago
- This is originally a collection of papers on neural network accelerators. Now it's more like my selection of research on deep learning an…☆2,007Updated last month