jha-lab / acceltranLinks
[TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers
☆52Updated last year
Alternatives and similar repositories for acceltran
Users that are interested in acceltran are comparing it to the libraries listed below
Sorting:
- ☆48Updated 4 years ago
- SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)☆33Updated this week
- Open-source of MSD framework☆16Updated 2 years ago
- A co-design architecture on sparse attention☆53Updated 4 years ago
- A framework for fast exploration of the depth-first scheduling space for DNN accelerators☆40Updated 2 years ago
- A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching☆67Updated last month
- Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.☆60Updated 3 months ago
- [HPCA 2023] ViTCoD: Vision Transformer Acceleration via Dedicated Algorithm and Accelerator Co-Design☆117Updated 2 years ago
- An FPGA Accelerator for Transformer Inference☆91Updated 3 years ago
- ☆44Updated 2 years ago
- [HPCA'21] SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning☆112Updated last year
- ☆35Updated 5 years ago
- An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.☆68Updated 3 weeks ago
- ☆58Updated last year
- FPGA-based hardware accelerator for Vision Transformer (ViT), with Hybrid-Grained Pipeline.☆98Updated 9 months ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆81Updated 3 years ago
- A bit-level sparsity-awared multiply-accumulate process element.☆17Updated last year
- MICRO22 artifact evaluation for Sparseloop☆44Updated 3 years ago
- ☆52Updated 3 months ago
- RTL implementation of Flex-DPE.☆113Updated 5 years ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆87Updated last year
- ☆48Updated 2 months ago
- ☆32Updated this week
- An efficient spatial accelerator enabling hybrid sparse attention mechanisms for long sequences☆29Updated last year
- H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference☆72Updated 6 months ago
- ☆71Updated 8 months ago
- An HLS based winograd systolic CNN accelerator☆54Updated 4 years ago
- Linux docker for the DNN accelerator exploration infrastructure composed of Accelergy and Timeloop☆58Updated last week
- ☆18Updated 2 years ago
- CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture☆157Updated this week