Alternatives and similar repositories for zigzag

Users that are interested in zigzag are comparing it to the libraries listed below

• arc-research-lab / CHARM
  CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture
  ☆163Updated last week
• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆64Updated 5 months ago
• Accelergy-Project / accelergy
  Accelergy is an energy estimation infrastructure for accelerator energy estimations
  ☆153Updated 6 months ago
• maeri-project / FEATHER
  A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
  ☆71Updated last month
• georgia-tech-synergy-lab / SIGMA
  RTL implementation of Flex-DPE.
  ☆115Updated 5 years ago
• stonne-simulator / stonne
  STONNE: A Simulation Tool for Neural Networks Engines
  ☆147Updated 5 months ago
• UCLA-VAST / AutoSA
  AutoSA: Polyhedral-Based Systolic Array Compiler
  ☆230Updated 2 years ago
• KULeuven-MICAS / DeFiNES
  A framework for fast exploration of the depth-first scheduling space for DNN accelerators
  ☆42Updated 2 years ago
• actlab-genesys / GeneSys
  An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.
  ☆69Updated 2 months ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆91Updated last year
• Accelergy-Project / timeloop-accelergy-exercises
  Exercises for exploring the Fibertree, Timeloop and Accelergy tools
  ☆108Updated 7 months ago
• mit-emze / cimloop
  ☆74Updated last month
• scalesim-project / SCALE-Sim
  Repository to host and maintain SCALE-Sim code
  ☆380Updated last month
• maestro-project / maestro
  An analytical cost model evaluating DNN mappings (dataflows and tiling).
  ☆241Updated last year
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆82Updated 4 years ago
• harvard-acc / smaug
  SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin
  ☆113Updated 2 years ago
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆61Updated 8 months ago
• pku-liang / Sanger
  A co-design architecture on sparse attention
  ☆54Updated 4 years ago
• wangxy-2000 / pimsim-nn
  ☆58Updated last year
• scalesim-project / scale-sim-v3
  ☆50Updated this week
• tancheng / CGRA-Flow
  CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.
  ☆145Updated 2 weeks ago
• zhaijw18 / mcpat-calib-public
  A RISC-V BOOM Microarchitecture Power Modeling Framework
  ☆30Updated 2 years ago
• maestro-project / gamma
  ☆42Updated last year
• groupsada / DeepBurning
  Automatic generation of FPGA-based learning accelerators for the neural network family
  ☆66Updated 5 years ago
• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆96Updated last year
• ecolab-nus / morpher
  An Open-Source Tool for CGRA Accelerators
  ☆76Updated 2 months ago
• BUAA-CI-LAB / Literatures-on-SRAM-based-CIM
  A reading list for SRAM-based Compute-In-Memory (CIM) research.
  ☆101Updated last month
• neurosim / DNN_NeuroSim_V1.3
  Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)
  ☆74Updated last year
• PSAL-POSTECH / ONNXim
  ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference
  ☆171Updated this week
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆44Updated 3 years ago