Alternatives and similar repositories for GEMINI-HPCA2024

Users that are interested in GEMINI-HPCA2024 are comparing it to the libraries listed below

• SET-Scheduling-Project / SET-ISCA2023
  The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.
  ☆76Updated 7 months ago
• leesou / H2-LLM-ISCA-2025
  H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference
  ☆72Updated 5 months ago
• scalesim-project / scale-sim-v3
  ☆48Updated 2 months ago
• Zhaoshixin-sky / CIM-MLC
  [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators
  ☆47Updated last year
• pku-liang / Sanger
  A co-design architecture on sparse attention
  ☆53Updated 4 years ago
• hatsu3 / Sanger
  ☆48Updated 4 years ago
• scale-snu / attacc_simulator
  ☆97Updated last year
• pku-liang / TENET
  An analytical framework that models hardware dataflow of tensor applications on spatial architectures using the relation-centric notation…
  ☆87Updated last year
• Accelergy-Project / micro22-sparseloop-artifact
  MICRO22 artifact evaluation for Sparseloop
  ☆44Updated 3 years ago
• Yinxiao-Feng / chiplet-network-sim
  ☆45Updated 4 months ago
• actlab-genesys / GeneSys
  An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.
  ☆67Updated 3 weeks ago
• georgia-tech-synergy-lab / SIGMA
  RTL implementation of Flex-DPE.
  ☆113Updated 5 years ago
• kelvin0207 / SparSynergy
  Open source RTL implementation of Tensor Core, Sparse Tensor Core, BitWave and SparSynergy in the article: "SparSynergy: Unlocking Flexib…
  ☆18Updated 6 months ago
• casys-kaist / mNPUsim
  mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)
  ☆65Updated 10 months ago
• PrincetonUniversity / muchiSim
  Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…
  ☆71Updated last year
• casys-kaist / NeuPIMs
  NeuPIMs: NPU-PIM Heterogeneous Acceleration for Batched LLM Inferencing
  ☆95Updated last year
• PSAL-POSTECH / ONNXim
  ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference
  ☆157Updated 8 months ago
• ucb-bar / cosa
  A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)
  ☆83Updated 2 years ago
• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆60Updated 3 months ago
• Aayush-Ankit / puma-simulator
  [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…
  ☆67Updated 2 years ago
• wangxy-2000 / pimsim-nn
  ☆58Updated last year
• sunxt99 / PIMCOMP-NN
  ☆71Updated 8 months ago
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆59Updated 7 months ago
• fangjh21 / PALM
  PALM: A Efficient Performance Simulator for Tiled Accelerators with Large-scale Model Training
  ☆19Updated last year
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆81Updated 3 years ago
• abdelfattah-lab / BitMoD-HPCA-25
  ☆52Updated 3 months ago
• xcw-1010 / HLSPilot
  ☆37Updated 10 months ago
• maeri-project / FEATHER
  A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
  ☆67Updated last month
• stonne-simulator / stonne
  STONNE: A Simulation Tool for Neural Networks Engines
  ☆140Updated 4 months ago
• arkhadem / aim_simulator
  A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0
  ☆41Updated 3 months ago