☆63Nov 29, 2025Updated 5 months ago
Alternatives and similar repositories for scale-sim-v3
Users that are interested in scale-sim-v3 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- The wafer-native AI accelerator simulation platform and inference engine.☆55Jan 1, 2026Updated 4 months ago
- Repository to host and maintain SCALE-Sim code☆456Feb 2, 2026Updated 3 months ago
- NPUsim: Full-Model, Cycle-Level, and Value-Aware Simulator for DNN Accelerators☆53Jan 2, 2025Updated last year
- GPGPU-Sim 中文注释版代码，包含 GPGPU-Sim 模拟器的最新版代码，经过中文注释，以帮助中文用户更好地理解和使用该模拟器。☆27Dec 18, 2024Updated last year
- This repository presents the source code for the paper "MILLION: Mastering Long-Context LLM Inference Via Outlier-Immunized KV Product Qu…☆23Apr 2, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- A parametric RTL code generator of an efficient integer MxM Systolic Array implementation for Xilinx FPGAs, with error detection capabili…☆14Aug 28, 2025Updated 8 months ago
- Nebula: Deep Neural Network Benchmarks in C++☆13Jan 2, 2025Updated last year
- ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference☆199Jan 8, 2026Updated 4 months ago
- ☆13Apr 15, 2025Updated last year
- HyFiSS: A Hybrid Fidelity Stall-Aware Simulator for GPGPUs☆42Dec 9, 2024Updated last year
- [DATE 2025] Official implementation and dataset of AIrchitect v2: Learning the Hardware Accelerator Design Space through Unified Represen…☆19Jan 17, 2025Updated last year
- Implementation of NM sparsity recipe presented in the paper "Progressive Gradient Flow for Robust N:M Sparsity Training in Transformers".☆11Feb 5, 2024Updated 2 years ago
- ☆243Oct 24, 2025Updated 6 months ago
- Heterogenous ML accelerator☆22May 5, 2025Updated last year
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Repository for compilation and cycle-accurate simulator for scale-out systolic arrays☆16Jan 4, 2023Updated 3 years ago
- LLM Inference analyzer for different hardware platforms☆111Apr 20, 2026Updated 2 weeks ago
- Open source RTL implementation of Tensor Core, Sparse Tensor Core, BitWave and SparSynergy in the article: "SparSynergy: Unlocking Flexib…☆24Mar 29, 2025Updated last year
- Differentiable Combinatorial Scheduling at Scale (ICML'24). Mingju Liu, Yingjie Li, Jiaqi Yin, Zhiru Zhang, Cunxi Yu.☆22Oct 31, 2024Updated last year
- ☆30Aug 4, 2025Updated 9 months ago
- CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture☆169Mar 12, 2026Updated last month
- GPU-accelerated LLM Training Simulator☆18Jun 26, 2025Updated 10 months ago
- Scalable In-Memory Acceleration With Mesh: Device, Circuits, Architecture, and Algorithm☆16Oct 11, 2020Updated 5 years ago
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆112Apr 28, 2025Updated last year
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- LLMServingSim 2.0: A Unified Simulator for Heterogeneous and Disaggregated LLM Serving Infrastructure☆255Apr 30, 2026Updated last week
- ☆12Jul 2, 2024Updated last year
- HISIM introduces a suite of analytical models at the system level to speed up performance prediction for AI models, covering logic-on-log…☆66Mar 29, 2026Updated last month
- An open-source simulator framework for neural processing units☆36Mar 23, 2026Updated last month
- Enhance CHISEL for Smooth and Comfortable Chip Design☆20Mar 29, 2026Updated last month
- ☆35Jul 9, 2020Updated 5 years ago
- GPGPU-SIM 使用篇☆14Nov 12, 2022Updated 3 years ago
- Here are some implementations of basic hardware units in RTL language (verilog for now), which can be used for area/power evaluation and …☆14Aug 25, 2023Updated 2 years ago
- ☆42Mar 31, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Haystack is an analytical cache model that given a program computes the number of cache misses.☆46Jul 15, 2019Updated 6 years ago
- PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions☆18Dec 18, 2023Updated 2 years ago
- [HPCA'21] SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning☆130Aug 27, 2024Updated last year
- ☆14Jul 25, 2024Updated last year
- 开放验证平台NutShell Cache验证案 例☆11Dec 2, 2025Updated 5 months ago
- The official implementation of HPCA 2025 paper, Prosperity: Accelerating Spiking Neural Networks via Product Sparsity☆39Aug 9, 2025Updated 9 months ago
- ☆39Mar 3, 2026Updated 2 months ago