scalesim-project / krittikaLinks
Heterogenous ML accelerator
☆18Updated 3 weeks ago
Alternatives and similar repositories for krittika
Users that are interested in krittika are comparing it to the libraries listed below
Sorting:
- ☆25Updated 3 years ago
- ☆16Updated 2 years ago
- STONNE Simulator integrated into SST Simulator☆19Updated last year
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆45Updated 3 years ago
- A reference implementation of the Mind Mappings Framework.☆29Updated 3 years ago
- NeuraChip Accelerator Simulator☆12Updated last year
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆55Updated 3 years ago
- ☆10Updated 2 years ago
- ☆28Updated 2 years ago
- ☆26Updated last year
- ☆33Updated 3 years ago
- CasHMC: A Cycle-accurate Simulator for Hybrid Memory Cube☆22Updated 6 years ago
- ☆11Updated 7 months ago
- Dynamically Reconfigurable Architecture Template and Cycle-level Microarchitecture Simulator for Dataflow AcCelerators☆28Updated last year
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆31Updated 3 years ago
- A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0☆17Updated 4 months ago
- DOSA: Differentiable Model-Based One-Loop Search for DNN Accelerators☆15Updated 7 months ago
- A Cycle-level simulator for M2NDP☆27Updated last month
- mRNA☆22Updated 4 years ago
- MICRO22 artifact evaluation for Sparseloop☆43Updated 2 years ago
- ☆41Updated 11 months ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆77Updated 3 years ago
- GNNear: Accelerating Full-Batch Training of Graph NeuralNetworks with Near-Memory Processing☆13Updated 2 years ago
- Domain-Specific Architecture Generator 2☆21Updated 2 years ago
- Hybrid Memory Cube Simulation & Research Infrastructure☆16Updated last year
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆79Updated last year
- Processing-in Memory Architecture for Multiply-Accumulate Operations with Hybrid Memory Cube☆12Updated 8 years ago
- This is a general-purpose simulator for unary computing based on PyTorch, with the paper accepted to ISCA 2020 and awarded IEEE Micro Top…☆42Updated 2 years ago
- ☆25Updated last year
- EQueue Dialect☆40Updated 3 years ago