Alternatives and similar repositories for ALSRAC

Users that are interested in ALSRAC are comparing it to the libraries listed below

• amahzoon / genmul
  ☆18Updated 4 years ago
• nbulsi / also
  A logic synthesis tool
  ☆82Updated 3 months ago
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆97Updated 2 weeks ago
• scale-lab / BACS
  Benchmarks for Approximate Circuit Synthesis
  ☆17Updated 5 years ago
• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆74Updated this week
• santoshsmalagi / Benchmarks
  A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.
  ☆58Updated 10 months ago
• OSCC-Project / iMap
  Logic optimization and technology mapping tool.
  ☆20Updated 2 years ago
• Entropy-xcy / sns
  ☆20Updated 3 years ago
• hkustgz-zhang-lab / ABCPaperCheck
  Research paper based on or related to ABC.
  ☆62Updated last month
• hkust-zhiyao / MasterRTL
  MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design
  ☆59Updated 6 months ago
• lsils / benchmarks
  EPFL logic synthesis benchmarks
  ☆220Updated 3 weeks ago
• Yu-Maryland / Gamora
  Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean Networks (DAC'23)
  ☆55Updated 11 months ago
• jpsety / verilog_benchmark_circuits
  EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog
  ☆29Updated 5 years ago
• Yu-Maryland / Verilog-to-PyG
  ☆29Updated last year
• ABKGroup / TritonRoute-WXL
  ☆34Updated 5 years ago
• ieee-ceda-datc / RDF-2019
  DATC RDF
  ☆50Updated 5 years ago
• panhomyoung / phyLS
  A Logic Synthesis tool based on "Mockturtle: EPFL Logic Synthesis Library " and "ABC: System for Sequential Logic Synthesis and Formal Ve…
  ☆38Updated 4 months ago
• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆107Updated last year
• Yu-Maryland / MapTune
  MapTune: Advancing ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning Mingju Liu, Daniel Robinson, Yingjie Li, Cunx…
  ☆22Updated 8 months ago
• zshi0616 / python-deepgate
  ☆26Updated last year
• Chenghao-Yang / awesome-ml4ls
  Awesome machine learning for logic synthesis
  ☆29Updated 3 years ago
• krzhu / abc_py
  Simple Python interface for ABC
  ☆26Updated 2 years ago
• TILOS-AI-Institute / MLCAD-2023-FPGA-Macro-Placement-Contest
  ☆31Updated 2 years ago
• krzhu / abcRL
  MLCAD 2020: Reinforcement for logic optimization sequence exploration
  ☆28Updated 5 years ago
• ASU-VDA-Lab / 2024_ICCAD_Contest_Gate_Sizing_Benchmark
  ☆23Updated last year
• JBlocklove / LLMs-for-EDA-Tutorial
  ☆54Updated 6 months ago
• cad-polito-it / I99T
  ITC'99 benchmarks developed in the CAD Group at Politecnico di Torino
  ☆66Updated 6 months ago
• ycunxi / FLowGen-CNNs-DAC18
  ☆16Updated 7 years ago
• zshi0616 / DeepGate2
  ☆31Updated 2 years ago
• NYU-MLDA / OpenABC
  OpenABC-D is a large-scale labeled dataset generated by synthesizing open source hardware IPs. This dataset can be used for various graph…
  ☆140Updated 4 months ago