The Verilog source code for DRUM approximate multiplier.
☆32May 4, 2023Updated 3 years ago
Alternatives and similar repositories for DRUM
Users that are interested in DRUM are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Approximate arithmetic circuits for FPGAs☆13Feb 19, 2020Updated 6 years ago
- ☆34Oct 2, 2023Updated 2 years ago
- A design of 15-order FIR filter using Verilog, with modulation and demodulation system using MATLAB☆11Aug 15, 2020Updated 5 years ago
- Alpha64 R10000 Two-Way Superscalar Processor☆12May 6, 2019Updated 7 years ago
- Benchmarks for Approximate Circuit Synthesis☆17Aug 2, 2020Updated 5 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- ☆22Jan 9, 2024Updated 2 years ago
- Software and Hardware models of Approximate Carry-Lookahead Adder with Intelligent Carry Judgement and Correction☆12Apr 21, 2022Updated 4 years ago
- An 8-bit multiplier is synthesized and simulated in Xilinx ISE using Verilog HDL. The multiplication is performed using Vedic Mathematics…☆10Jul 27, 2020Updated 5 years ago
- Project aimed at implementing floating point operators using the DSP48E1 slice.☆30Mar 29, 2013Updated 13 years ago
- Approximate layers - TensorFlow extension☆27Apr 14, 2025Updated last year
- Systolic Three Matrix Multiplier for Graph Convolutional Networks using High Level Synthesis☆24Jul 29, 2022Updated 3 years ago
- Niklas Een's ABC/ZZ framework☆25May 14, 2022Updated 4 years ago
- Space CACD☆11Oct 16, 2019Updated 6 years ago
- Verilog Language Extension for Visual Studio☆20Jan 14, 2026Updated 4 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- This project produces a clean GDSII Layout with all its details that are used to print photomasks used in the fabrication of a behavioral…☆16Oct 16, 2021Updated 4 years ago
- SPI to I2C Protocol Conversion Using Verilog. Final Year BTech project. Also published an IEEE paper.☆14Jul 28, 2021Updated 4 years ago
- Simple library for decoding RISC-V instructions☆24Nov 19, 2025Updated 6 months ago
- 2020 xilinx summer school☆20Aug 13, 2020Updated 5 years ago
- Pytorch implementation of RAPQ, IJCAI 2022☆23Jul 19, 2023Updated 2 years ago
- The source code for the XTRX FPGA image☆17Nov 19, 2022Updated 3 years ago
- FPGA config visualized. demo:☆20Mar 17, 2020Updated 6 years ago
- VHDL ieee_proposed library, imported as is. See also https://github.com/FPHDL/fphdl☆12Aug 26, 2016Updated 9 years ago
- SCARIF is a tool to estimate the embodied carbon emissions of data center servers with accelerator hardware (GPUs, FPGAs, etc.)☆15Updated this week
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- ☆20Feb 12, 2025Updated last year
- Hardware and script files related to dynamic partial reconfiguration☆11Mar 16, 2018Updated 8 years ago
- Library of approximate arithmetic circuits☆64Jan 14, 2026Updated 4 months ago
- BSQ: Exploring Bit-Level Sparsity for Mixed-Precision Neural Network Quantization (ICLR 2021)☆41Jan 12, 2021Updated 5 years ago
- ☆16Apr 10, 2023Updated 3 years ago
- 🔁 elastic circuit toolchain☆33Dec 2, 2024Updated last year
- MulApprox - A comprehensive library of state-of-the-art approximate multipliers☆34Jun 27, 2021Updated 4 years ago
- Linear algebra accelerators for RISC-V (published in ICCD 17)☆66Oct 5, 2017Updated 8 years ago
- LMAC Core1 - Ethernet 1G/100M/10M☆19Apr 3, 2023Updated 3 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- RISC-V soft-core PEs for TaPaSCo☆23Jan 30, 2026Updated 4 months ago
- Tool for graphically viewing FPGA bitstream files and their connection to FASM features.☆19Apr 6, 2022Updated 4 years ago
- ☆24Nov 11, 2025Updated 7 months ago
- A Rocket-based RISC-V superscalar in-order core☆40Mar 11, 2026Updated 3 months ago
- PLEASE MOVE TO PAWSv2☆16Feb 2, 2022Updated 4 years ago
- A MIPS CPU with dual-issue, out-of-order, and 5-stage pipelines☆11Nov 28, 2019Updated 6 years ago
- Functional Verification of Physical Layer of PCI Express Gen5.0 Graduation Project Using UVM☆29Jul 17, 2025Updated 10 months ago