ABACUS is a tool for approximate logic synthesis
☆14Jul 13, 2020Updated 5 years ago
Alternatives and similar repositories for ABACUS
Users that are interested in ABACUS are comparing it to the libraries listed below
Sorting:
- An Approximate Logic Synthesis Framework based on Boolean Matrix Factorization☆32Nov 13, 2023Updated 2 years ago
- Benchmarks for Approximate Circuit Synthesis☆17Aug 2, 2020Updated 5 years ago
- Approximate arithmetic circuits for FPGAs☆13Feb 19, 2020Updated 6 years ago
- Low level design of a chip built for optimizing/accelerating CNN classifiers over gray scale images.☆13May 14, 2019Updated 6 years ago
- AxLS: An Open-Source Framework for Netlist Transformation Approximate Logic Synthesis☆13Sep 14, 2025Updated 6 months ago
- ☆22Sep 27, 2022Updated 3 years ago
- A copy of the latest version of MVSIS☆12Apr 18, 2021Updated 4 years ago
- DASS HLS Compiler☆29Oct 4, 2023Updated 2 years ago
- ☆16Apr 13, 2018Updated 7 years ago
- C Socket Programming for Linux with a Server and Client Example Code☆10Jan 5, 2022Updated 4 years ago
- ☆13Sep 19, 2016Updated 9 years ago
- Static Block Floating Point Quantization for CNN☆37Jun 9, 2021Updated 4 years ago
- Verilog VPI module to dump FST (Fast Signal Trace) databases☆20Sep 19, 2023Updated 2 years ago
- This is the canonical git mirror of the LLVM subversion repository. The repository does not accept github pull requests at this moment. P…☆11Oct 23, 2019Updated 6 years ago
- Heterogeneous simulator for DECADES Project☆32May 23, 2024Updated last year
- Open-sourced utilities for initial flow setup, calibration, and other user functions for OpenROAD project☆20Aug 20, 2019Updated 6 years ago
- Anatomy of a powerhouse: SystemVerilog TPU based on Google TPU v1☆20Nov 9, 2025Updated 4 months ago
- ☆17Nov 16, 2018Updated 7 years ago
- ☆10Nov 5, 2019Updated 6 years ago
- An LLVM pass to prove that an II works for the given loop for Vitis HLS☆11Aug 22, 2021Updated 4 years ago
- Personal Website☆11Mar 11, 2026Updated last week
- C++ header-only reasoning library☆16Jul 11, 2024Updated last year
- Niklas Een's ABC/ZZ framework☆24May 14, 2022Updated 3 years ago
- Lower chisel memories to SRAM macros☆13Mar 25, 2024Updated last year
- NetCracker is an FPGA architecture analysis tool for facilitating the investigation of connectivity patterns within as well as in between…☆17Dec 4, 2020Updated 5 years ago
- Tutorial of how to deloy DNN on android device using TFLite☆12Aug 23, 2019Updated 6 years ago
- Boosted E-Graph Extraction with Adaptive Heuristics and Exact Solving☆29Jan 7, 2026Updated 2 months ago
- A synthesis flow for hybrid processing-in-RRAM modes☆12Jul 15, 2021Updated 4 years ago
- Library of approximate arithmetic circuits☆62Jan 14, 2026Updated 2 months ago
- Analog IC symmetry extraction benchmark of AncstrGNN☆10Aug 19, 2024Updated last year
- chatgpt api proxy☆14May 14, 2023Updated 2 years ago
- A comparative analysis of speech signal processing algorithms for Parkinson’s disease classification and the use of the tunable Q-factor …☆15Dec 8, 2022Updated 3 years ago
- ☆17Mar 2, 2021Updated 5 years ago
- ☆59Jan 19, 2026Updated 2 months ago
- tools regarding on analog modeling, validation, and generation☆22Apr 11, 2023Updated 2 years ago
- This repository contains the hardware implementation for Static BFP convolution on FPGA☆10Oct 15, 2019Updated 6 years ago
- ☆65May 6, 2020Updated 5 years ago
- A fast, accurate trace-based simulator for High-Level Synthesis.☆74Dec 19, 2025Updated 3 months ago
- 2020 密院git workshop资料☆12Mar 18, 2020Updated 6 years ago