Alternatives and similar repositories for UTH-Timer

Users that are interested in UTH-Timer are comparing it to the libraries listed below

• geochrist / dctk
  Delay Calculation ToolKit
  ☆32Updated 3 years ago
• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆80Updated 2 months ago
• The-OpenROAD-Project / TritonRoute
  UCSD Detailed Router
  ☆96Updated 5 years ago
• recurme / Mixed-Cell-Height_legalizer
  ☆13Updated last year
• NVlabs / INSTA
  ☆95Updated 7 months ago
• ASU-VDA-Lab / 2024_ICCAD_Contest_Gate_Sizing_Benchmark
  ☆27Updated last year
• cuhk-eda / CULS
  GPU-based logic synthesis tool
  ☆97Updated 2 months ago
• rachelselinar / DREAMPlaceFPGA
  An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit
  ☆91Updated 9 months ago
• ABKGroup / RosettaStone
  ☆33Updated 3 years ago
• lamda-bbo / Efficient-TDP
  Official implementation of DATE'25 paper "Timing-Driven Global Placement by Efficient Critical Path Extraction".
  ☆62Updated 7 months ago
• IntelLabs / FloorSet
  ☆79Updated last month
• The-OpenROAD-Project-Attic / FastRoute
  LEF/DEF-based port of Iowa State's open-source FastRoute 4.1
  ☆60Updated 5 years ago
• ieee-ceda-datc / RDF-2019
  DATC RDF
  ☆50Updated 5 years ago
• cuhk-eda / cu-gr
  CUGR, VLSI Global Routing Tool Developed by CUHK
  ☆142Updated 2 years ago
• Ravenslofty / librecell
  ☆26Updated 4 years ago
• JBlocklove / LLMs-for-EDA-Tutorial
  ☆59Updated 2 weeks ago
• santoshsmalagi / Benchmarks
  A collection of ISCAS,ITC,TAU and other Benchmark Circuits for EDA tool evaluation.
  ☆61Updated last year
• lrakai / gate-sizing
  Optimal gate sizing of digital circuits using geometric programming
  ☆11Updated 9 years ago
• ABKGroup / PROBE3.0
  ☆50Updated last year
• ieee-ceda-datc / datc-rdf-Metrics4ML
  ☆32Updated 4 years ago
• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆109Updated last year
• magical-eda / MAGICAL-CIRCUITS
  Circuit release of the MAGICAL project
  ☆40Updated 6 years ago
• CODA-Team / AncstrGNN_benchmark
  Analog IC symmetry extraction benchmark of AncstrGNN
  ☆10Updated last year
• ABKGroup / TritonPart
  The first version of TritonPart
  ☆31Updated 2 years ago
• cuhk-eda / Xplace
  Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization
  ☆156Updated 3 weeks ago
• hkust-zhiyao / MasterRTL
  MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design
  ☆66Updated 8 months ago
• limbo018 / Limbo
  Library for VLSI CAD Design Useful parsers and solvers' api are implemented.
  ☆190Updated 8 months ago
• jinwookjungs / lefdef_util
  A LEF/DEF Utility.
  ☆33Updated 6 years ago
• jinwookjungs / datc_robust_design_flow
  DATC Robust Design Flow.
  ☆36Updated 6 years ago
• ABKGroup / PROBE_SMT_AutoCell
  ☆21Updated 2 years ago