Delay Calculation ToolKit
☆32Aug 7, 2022Updated 4 years ago
Alternatives and similar repositories for dctk
Users that are interested in dctk are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Gate-level timing estimation toolkit☆25Apr 11, 2022Updated 4 years ago
- Optimal gate sizing of digital circuits using geometric programming☆11Aug 18, 2016Updated 10 years ago
- A High-performance Timing Analysis Tool for VLSI Systems☆720Dec 26, 2025Updated 9 months ago
- ☆43Nov 28, 2022Updated 3 years ago
- 9 track standard cells for GF180MCU provided by GlobalFoundries.☆19Dec 5, 2022Updated 3 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- A free standard cell library for SDDS-NCL circuits☆29Aug 5, 2026Updated 2 months ago
- Qucs-Help documentation☆10Jul 25, 2018Updated 8 years ago
- discrete gate sizing☆14Nov 23, 2020Updated 5 years ago
- DATC RDF☆49Jul 31, 2020Updated 6 years ago
- Bounded-Skew DME v1.3☆15Aug 3, 2018Updated 8 years ago
- OpenSTA engine☆629Updated this week
- Pulsar asynchronous synthesis framework☆13Jun 29, 2026Updated 3 months ago
- EDA physical synthesis optimization kit☆69Nov 13, 2023Updated 2 years ago
- ☆132Updated this week
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆15Jul 19, 2024Updated 2 years ago
- iEDA water-drop training initiative☆14Sep 10, 2024Updated 2 years ago
- Analog IC symmetry extraction benchmark of AncstrGNN☆11Aug 19, 2024Updated 2 years ago
- Interactive 3D Layout Viewer for GDSII☆20Jun 14, 2024Updated 2 years ago
- ☆17Jul 16, 2020Updated 6 years ago
- Benchmarks for Approximate Circuit Synthesis☆17Aug 2, 2020Updated 6 years ago
- Public repository for Task 6 of OpenROAD project. ML-based PDN synthesis and optimization.☆42Jul 6, 2023Updated 3 years ago
- EPFL logic synthesis benchmarks☆270Aug 13, 2026Updated 2 months ago
- This package provides a gnucap based qucsator implementation.☆16May 13, 2026Updated 5 months ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- ☆34Dec 16, 2021Updated 4 years ago
- We open-source our layout level fast EM simulation tool, EMSim, to the public.☆16Feb 8, 2024Updated 2 years ago
- ☆44Jan 26, 2020Updated 6 years ago
- A High-performance Timing Analysis Tool for VLSI Systems☆10Feb 11, 2021Updated 5 years ago
- Characterizer☆39Aug 26, 2026Updated last month
- The Berkeley Verilog-A Parser and Processor☆15Mar 24, 2017Updated 9 years ago
- ☆27Apr 24, 2021Updated 5 years ago
- ☆31Dec 8, 2025Updated 10 months ago
- Circuit simulator of the Qucs project☆36Dec 21, 2025Updated 9 months ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- UCSD Sizer for leakage/dynamic power recovery, timing recovery☆18Mar 5, 2019Updated 7 years ago
- Open-source repository for a standard-cell library characterizer using complete open-source tools☆70Sep 22, 2026Updated 3 weeks ago
- An open-source EDA infrastructure and tools from netlist to GDS☆551Jul 9, 2026Updated 3 months ago
- IRSIM switch-level simulator for digital circuits☆39Nov 13, 2025Updated 11 months ago
- IO and Pin Placer for Floorplan-Placement Subflow☆24Aug 11, 2020Updated 6 years ago
- This repo awesome-AI4EDA contains the source for the webpage: https://ai4eda.github.io, which is a curated paper list of awesome AI for E…☆217May 21, 2026Updated 4 months ago
- C++ implementation of FRAIGs. Won the 1st place in 2018 Cadence-sponsored contest in NTU DSnP.☆10Oct 21, 2020Updated 5 years ago