riscv-boom / boom-templateLinks
DEPRECATED. Please use Chipyard (https://github.com/ucb-bar/chipyard) to build BOOM
☆36Updated 5 years ago
Alternatives and similar repositories for boom-template
Users that are interested in boom-template are comparing it to the libraries listed below
Sorting:
- Tests for example Rocket Custom Coprocessors☆75Updated 5 years ago
- A Style Guide for the Chisel Hardware Construction Language☆108Updated 4 years ago
- ☆80Updated last year
- Pure digital components of a UCIe controller☆73Updated last week
- Advanced Interface Bus (AIB) die-to-die hardware open source☆140Updated last year
- Chisel Learning Journey☆110Updated 2 years ago
- CVA6 SDK containing RISC-V tools and Buildroot☆74Updated 3 months ago
- Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).☆59Updated this week
- Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)☆63Updated 2 years ago
- RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores☆91Updated last month
- Provides dot visualizations of chisel/firrtl circuits☆122Updated 2 years ago
- Public release☆56Updated 6 years ago
- Basic floating-point components for RISC-V processors☆66Updated 5 years ago
- AXI Adapter(s) for RISC-V Atomic Operations☆66Updated last month
- educational microarchitectures for risc-v isa☆67Updated 6 years ago
- ☆67Updated 4 years ago
- Setup scripts and files needed to compile CoreMark on RISC-V☆70Updated last year
- ☆78Updated 10 years ago
- Comment on the rocket-chip source code☆179Updated 7 years ago
- OpTiMSoC - A tiled SoC platform with a mesh NoC and OpenRISC CPU cores☆85Updated 4 years ago
- RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs and different MP applications☆179Updated 11 months ago
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆112Updated 2 years ago
- Microarchitecture implementation of the decoupled vector-fetch accelerator☆155Updated last year
- ☆95Updated 2 months ago
- ☆99Updated 2 years ago
- Examples for creating AXI-interfaced peripherals in Chisel☆76Updated 9 years ago
- openHMC - an open source Hybrid Memory Cube Controller☆50Updated 9 years ago
- An Open-Source Design and Verification Environment for RISC-V☆84Updated 4 years ago
- Project repo for the POSH on-chip network generator☆50Updated 7 months ago
- ☆20Updated 5 years ago